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SN74LVTH273DWR

2.7V~3.6V 150MHz 8 Bit D-Type Flip Flop DUAL 74LVTH273 20 Pins 190μA 74LVTH Series 20-SOIC (0.295, 7.50mm Width)

Manufacturer: Texas Instruments
Origchip NO: 815-SN74LVTH273DWR
Package: 20-SOIC (0.295, 7.50mm Width)
Datasheet: PDF
Stock: 162
Description: 2.7V~3.6V 150MHz 8 Bit D-Type Flip Flop DUAL 74LVTH273 20 Pins 190μA 74LVTH Series 20-SOIC (0.295, 7.50mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time	6 Weeks
Lifecycle Status	ACTIVE (Last Updated: 6 days ago)
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	20-SOIC (0.295, 7.50mm Width)
Number of Pins	20
Weight	500.709277mg
Operating Temperature	-40°C~85°C TA
Packaging	Cut Tape (CT)
Series	74LVTH
JESD-609 Code	e4
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	20
ECCN Code	EAR99
Type	D-Type
Terminal Finish	Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory	FF/Latches
Packing Method	TR
Technology	BICMOS
Voltage - Supply	2.7V~3.6V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	3.3V
Base Part Number	74LVTH273
Function	Master Reset
Output Type	Non-Inverted
Operating Supply Voltage	3.3V
Number of Elements	1
Polarity	Non-Inverting
Supply Voltage-Max (Vsup)	3.6V
Supply Voltage-Min (Vsup)	2.7V
Number of Circuits	8
Load Capacitance	50pF
Output Current	64mA
Number of Bits	8
Clock Frequency	150MHz
Propagation Delay	3.2 ns
Turn On Delay Time	3.2 ns
Family	LVT
Logic Function	D-Type, Flip-Flop
Current - Quiescent (Iq)	190μA
Current - Output High, Low	32mA 64mA
Max I(ol)	0.064 A
Max Propagation Delay @ V, Max CL	4.9ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup	4.9 ns
Trigger Type	Positive Edge
Input Capacitance	4pF
Power Supply Current-Max (ICC)	5mA
Clock Edge Trigger Type	Positive Edge
Height	2.65mm
Length	12.8mm
Width	7.5mm
Thickness	2.35mm
Radiation Hardening	No
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

SN74LVTH273DWR Overview

As a result, it is packaged as 20-SOIC (0.295, 7.50mm Width). There is an embedded version in the package Cut Tape (CT). T flip flop uses Non-Invertedas the output. The trigger configured with it uses Positive Edge. It is mounted in the way of Surface Mount. A voltage of 2.7V~3.6Vis used as the supply voltage. It is at -40°C~85°C TAdegrees Celsius that the system is operating. It belongs to the type D-Typeof flip flops. FPGAs belonging to the 74LVTHseries contain this type of chip. This D flip flop should not have a frequency greater than 150MHz. D latch consists of 1 elements. During its operation, it consumes 190μA quiescent energy. A total of 20terminations have been recorded. You can search similar parts based on 74LVTH273. The D flip flop is powered by a voltage of 3.3V . JK flip flop input capacitance is 4pF farads. It belongs to the family of electronic devices known as LVT. A part of the electronic system is mounted in the way of Surface Mount. This board is designed with 20pins on it. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. The RS flip flops belongs to FF/Latches base part number. The flip flop is designed with 8bits. The maximal supply voltage (Vsup) reaches 3.6V. Normal operation requires a supply voltage (Vsup) above 2.7V. Its superior flexibility is attributed to its use of 8 circuits. On the basis of its reliable performance, this D flip flop is well suited for use with TR. Optimal efficiency requires a supply voltage of 3.3V. In addition to its maximum design flexibility, the output current of the T flip flop is 64mA.