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SN74LVCH16374ADLR

1.65V~3.6V 150MHz 16 Bit D-Type Flip Flop DUAL 74LVCH16374 48 Pins 20μA 74LVCH Series 48-BSSOP (0.295, 7.50mm Width)

Manufacturer: Texas Instruments
Origchip NO: 815-SN74LVCH16374ADLR
Package: 48-BSSOP (0.295, 7.50mm Width)
Datasheet: -
Stock: 643
Description: 1.65V~3.6V 150MHz 16 Bit D-Type Flip Flop DUAL 74LVCH16374 48 Pins 20μA 74LVCH Series 48-BSSOP (0.295, 7.50mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time	6 Weeks
Lifecycle Status	ACTIVE (Last Updated: 4 days ago)
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	48-BSSOP (0.295, 7.50mm Width)
Number of Pins	48
Weight	600.301152mg
Operating Temperature	-40°C~125°C TA
Packaging	Tape & Reel (TR)
Series	74LVCH
JESD-609 Code	e4
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	48
ECCN Code	EAR99
Type	D-Type
Terminal Finish	Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory	FF/Latches
Packing Method	TR
Technology	CMOS
Voltage - Supply	1.65V~3.6V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	1.8V
Base Part Number	74LVCH16374
Function	Standard
Output Type	Tri-State, Non-Inverted
Number of Elements	2
Polarity	Non-Inverting
Supply Voltage-Min (Vsup)	1.65V
Load Capacitance	50pF
Number of Ports	2
Output Current	24mA
Number of Bits	16
Clock Frequency	150MHz
Propagation Delay	6.1 ns
Turn On Delay Time	1.5 ns
Family	LVC/LCX/Z
Logic Function	D-Type, Flip-Flop
Current - Quiescent (Iq)	20μA
Current - Output High, Low	24mA 24mA
Max Propagation Delay @ V, Max CL	4.5ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup	4.5 ns
Trigger Type	Positive Edge
Input Capacitance	5pF
Number of Input Lines	8
Number of Output Lines	3
Count Direction	UNIDIRECTIONAL
Clock Edge Trigger Type	Positive Edge
Translation	N/A
Max Frequency@Nom-Sup	150000000Hz
Height	2.79mm
Length	15.88mm
Width	7.49mm
Thickness	2.59mm
Radiation Hardening	No
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

SN74LVCH16374ADLR Overview

As a result, it is packaged as 48-BSSOP (0.295, 7.50mm Width). A package named Tape & Reel (TR)includes it. This output is configured with Tri-State, Non-Inverted. JK flip flop uses Positive Edgeas the trigger. There is an electronic component mounted in the way of Surface Mount. A voltage of 1.65V~3.6Vis used as the supply voltage. Currently, the operating temperature is -40°C~125°C TA. This D latch has the type D-Type. This type of FPGA is a part of the 74LVCH series. This D flip flop should not have a frequency greater than 150MHz. A total of 2elements are contained within it. This process consumes 20μA quiescents. There have been 48 terminations. It is a member of the 74LVCH16374 family. A voltage of 1.8V is used as the power supply for this D latch. A 5pFfarad input capacitance is provided by this T flip flop. It belongs to the family of electronic devices known as LVC/LCX/Z. There is an electronic part that is mounted in the way of Surface Mount. It is designed with 48 pins. A Positive Edgeclock edge trigger is used in this device. This device has the base part number FF/Latches. An electronic part with 16bits has been designed. For normal operation, the supply voltage (Vsup) should be kept above 1.65V. Due to its reliability, this T flip flop is well suited for TR. The D flip flop is embedded with 2ports. As a result of its output current of 24mA, it is very flexible in terms of design. There are no output lines on the JK flip flop. This input has 8lines in it.