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SN74LVC823APWR

1.65V~3.6V 150MHz 9 Bit D-Type Flip Flop DUAL 74LVC823 24 Pins 10μA 74LVC Series 24-TSSOP (0.173, 4.40mm Width)

Manufacturer: Texas Instruments
Origchip NO: 815-SN74LVC823APWR
Package: 24-TSSOP (0.173, 4.40mm Width)
Datasheet: -
Stock: 417
Description: 1.65V~3.6V 150MHz 9 Bit D-Type Flip Flop DUAL 74LVC823 24 Pins 10μA 74LVC Series 24-TSSOP (0.173, 4.40mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time	6 Weeks
Lifecycle Status	ACTIVE (Last Updated: 4 days ago)
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	24-TSSOP (0.173, 4.40mm Width)
Number of Pins	24
Weight	89.499445mg
Operating Temperature	-40°C~85°C TA
Packaging	Tape & Reel (TR)
Series	74LVC
JESD-609 Code	e4
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	24
Type	D-Type
Terminal Finish	Nickel/Palladium/Gold (Ni/Pd/Au)
Additional Feature	WITH CLEAR AND CLOCK ENABLE
Subcategory	Bus Driver/Transceiver
Packing Method	TR
Technology	CMOS
Voltage - Supply	1.65V~3.6V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	1.8V
Terminal Pitch	0.65mm
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
Base Part Number	74LVC823
Function	Master Reset
Qualification Status	Not Qualified
Output Type	Tri-State, Non-Inverted
Number of Elements	1
Polarity	Non-Inverting
Load Capacitance	50pF
Number of Ports	2
Output Current	24mA
Number of Bits	9
Clock Frequency	150MHz
Propagation Delay	8.9 ns
Turn On Delay Time	1.3 ns
Family	LVC/LCX/Z
Logic Function	D-Type, Flip-Flop
Current - Quiescent (Iq)	10μA
Current - Output High, Low	24mA 24mA
Max Propagation Delay @ V, Max CL	8ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup	8 ns
Trigger Type	Positive Edge
Input Capacitance	5pF
Number of Input Lines	9
Number of Output Lines	3
Count Direction	UNIDIRECTIONAL
Clock Edge Trigger Type	Positive Edge
Translation	N/A
Height	1.2mm
Length	7.8mm
Width	4.4mm
Thickness	1mm
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

SN74LVC823APWR Overview

24-TSSOP (0.173, 4.40mm Width)is the way it is packaged. A package named Tape & Reel (TR)includes it. Currently, the output is configured to use Tri-State, Non-Inverted. There is a trigger configured with Positive Edge. There is an electric part mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 1.65V~3.6V. Temperature is set to -40°C~85°C TA. This electronic flip flop is of type D-Type. JK flip flop is a part of the 74LVCseries of FPGAs. In order for it to function properly, its output frequency should not exceed 150MHz. There are 1 elements in it. T flip flop consumes 10μA quiescent energy. There have been 24 terminations. It is a member of the 74LVC823 family. A voltage of 1.8V is used as the power supply for this D latch. The input capacitance of this T flip flop is 5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. Devices in the LVC/LCX/Zfamily are electronic devices. Surface Mount mounts this electronic component. This board has 24 pins. A Positive Edgeclock edge trigger is used in this device. The RS flip flops belongs to Bus Driver/Transceiver base part number. The design is based on 9bits. This D flip flop is well suited for TR based on its reliable performance. The flip flop has 2ports embedded within it. With an output current of 24mA, it is possible to design the device in any way you want. To operate, the chip has a total of 3 output lines. It has 9lines. Furthermore, it has WITH CLEAR AND CLOCK ENABLEas a characteristic.