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SN74LVC74APWT

1.65V~3.6V 150MHz D-Type Flip Flop DUAL 74LVC74 14 Pins 10μA 74LVC Series 14-TSSOP (0.173, 4.40mm Width)

Manufacturer: Texas Instruments
Origchip NO: 815-SN74LVC74APWT
Package: 14-TSSOP (0.173, 4.40mm Width)
Datasheet: PDF
Stock: 361
Description: 1.65V~3.6V 150MHz D-Type Flip Flop DUAL 74LVC74 14 Pins 10μA 74LVC Series 14-TSSOP (0.173, 4.40mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time	6 Weeks
Lifecycle Status	ACTIVE (Last Updated: 4 days ago)
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	14-TSSOP (0.173, 4.40mm Width)
Number of Pins	14
Weight	57.209338mg
Operating Temperature	-40°C~125°C TA
Packaging	Tape & Reel (TR)
Series	74LVC
JESD-609 Code	e4
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	14
Termination	SMD/SMT
Type	D-Type
Terminal Finish	Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory	FF/Latches
Packing Method	TR
Technology	CMOS
Voltage - Supply	1.65V~3.6V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	1.8V
Base Part Number	74LVC74
Function	Set(Preset) and Reset
Output Type	Differential
Polarity	Non-Inverting
Supply Voltage-Max (Vsup)	3.6V
Power Supplies	3.3V
Number of Circuits	2
Load Capacitance	50pF
Output Current	24mA
Clock Frequency	150MHz
Propagation Delay	7.1 ns
Turn On Delay Time	1 ns
Family	LVC/LCX/Z
Logic Function	AND, D-Type, Flip-Flop
Current - Quiescent (Iq)	10μA
Current - Output High, Low	24mA 24mA
Number of Bits per Element	1
Max Propagation Delay @ V, Max CL	5.2ns @ 3.3V, 50pF
Trigger Type	Positive Edge
Input Capacitance	5pF
Number of Output Lines	1
Clock Edge Trigger Type	Positive Edge
Height	1.2mm
Length	5mm
Width	4.4mm
Thickness	1mm
Radiation Hardening	No
REACH SVHC	No SVHC
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

SN74LVC74APWT Overview

It is packaged in the way of 14-TSSOP (0.173, 4.40mm Width). The package Tape & Reel (TR)contains it. Currently, the output is configured to use Differential. It is configured with the trigger Positive Edge. The electronic part is mounted in the way of Surface Mount. The JK flip flop operates at 1.65V~3.6Vvolts. It is operating at a temperature of -40°C~125°C TA. D-Typeis the type of this D latch. The 74LVCseries comprises this type of FPGA. This D flip flop should not have a frequency greater than 150MHz. As a result, it consumes 10μA quiescent current and is not affected by external forces. In 14terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. It is a member of the 74LVC74 family. The D flip flop is powered by a voltage of 1.8V . A JK flip flop with a 5pFfarad input capacitance is used here. It is a member of the LVC/LCX/Zfamily of D flip flop. There is an electronic part mounted in the way of Surface Mount. This board has 14 pins. In this device, the clock edge trigger type is Positive Edge. This RS flip flops is a part number FF/Latches. It reaches the maximum supply voltage (Vsup) at 3.6V. 2 circuits are used to achieve its superior flexibility. Considering the reliability of this T flip flop, it is well suited for TR. It operates from 3.3V power supplies. With an output current of 24mA, it is possible to design the device in any way you want. There are no output lines on the JK flip flop.