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SN74LVC74ADR

1.65V~3.6V 150MHz D-Type Flip Flop DUAL 74LVC74 14 Pins 74LVC Series 14-SOIC (0.154, 3.90mm Width)

Manufacturer: Texas Instruments
Origchip NO: 815-SN74LVC74ADR
Package: 14-SOIC (0.154, 3.90mm Width)
Datasheet: PDF
Stock: 227
Description: 1.65V~3.6V 150MHz D-Type Flip Flop DUAL 74LVC74 14 Pins 74LVC Series 14-SOIC (0.154, 3.90mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time	6 Weeks
Lifecycle Status	ACTIVE (Last Updated: 3 days ago)
Contact Plating	Gold
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	14-SOIC (0.154, 3.90mm Width)
Number of Pins	14
Weight	129.387224mg
Operating Temperature	-40°C~125°C TA
Packaging	Cut Tape (CT)
Series	74LVC
JESD-609 Code	e4
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	14
ECCN Code	EAR99
Type	D-Type
Subcategory	FF/Latch
Packing Method	TR
Technology	CMOS
Voltage - Supply	1.65V~3.6V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	1.8V
Base Part Number	74LVC74
Function	Set(Preset) and Reset
Output Type	Differential
Polarity	Non-Inverting
Supply Voltage-Max (Vsup)	3.6V
Power Supplies	3.3V
Number of Circuits	2
Load Capacitance	50pF
Output Current	24mA
Clock Frequency	150MHz
Propagation Delay	6 ns
Quiescent Current	10μA
Turn On Delay Time	1 ns
Family	LVC/LCX/Z
Logic Function	AND, D-Type, Flip-Flop
Current - Output High, Low	24mA 24mA
Number of Bits per Element	1
Max Propagation Delay @ V, Max CL	5.2ns @ 3.3V, 50pF
Trigger Type	Positive Edge
Input Capacitance	5pF
Number of Output Lines	1
Clock Edge Trigger Type	Positive Edge
Height	1.75mm
Length	8.65mm
Width	3.91mm
Thickness	1.58mm
Radiation Hardening	No
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

SN74LVC74ADR Overview

In the form of 14-SOIC (0.154, 3.90mm Width), it has been packaged. The package Cut Tape (CT)contains it. Currently, the output is configured to use Differential. It is configured with a trigger that uses Positive Edge. Surface Mountis positioned in the way of this electronic part. The JK flip flop operates with an input voltage of 1.65V~3.6V volts. A temperature of -40°C~125°C TAis considered to be the operating temperature. Logic flip flops of this type are classified as D-Type. JK flip flop is a part of the 74LVCseries of FPGAs. A frequency of 150MHzshould be the maximum output frequency. A total of 14terminations have been recorded. The object belongs to the 74LVC74 family. Power is supplied from a voltage of 1.8V volts. The input capacitance of this JK flip flopis 5pF farads. This D flip flop belongs to the family of LVC/LCX/Z. There is an electronic part mounted in the way of Surface Mount. As you can see from the design, it has pins with 14. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. It is part of the FF/Latchbase part number family. Vsup reaches 3.6V, the maximal supply voltage. To achieve this superior flexibility, 2 circuits are used. Considering its reliability, this T flip flop is well suited for TR. There are 3.3V power supplies attached to it. The output current of 24mA makes it feature maximum design flexibility. It has 1 output lines to operate. Despite external influences, it consumes 10μAof quiescent current.