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SN74LVC374ADWR

1.65V~3.6V 100MHz 8 Bit D-Type Flip Flop DUAL 74LVC374 20 Pins 74LVC Series 20-SOIC (0.295, 7.50mm Width)


  • Manufacturer: Texas Instruments
  • Origchip NO: 815-SN74LVC374ADWR
  • Package: 20-SOIC (0.295, 7.50mm Width)
  • Datasheet: PDF
  • Stock: 192
  • Description: 1.65V~3.6V 100MHz 8 Bit D-Type Flip Flop DUAL 74LVC374 20 Pins 74LVC Series 20-SOIC (0.295, 7.50mm Width)(Kg)

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Details

Tags

Parameters
Output Current 24mA
Number of Bits 8
Clock Frequency 100MHz
Propagation Delay 8.1 ns
Quiescent Current 10μA
Turn On Delay Time 1.5 ns
Family LVC/LCX/Z
Logic Function D-Type, Flip-Flop
Output Characteristics 3-STATE
Current - Output High, Low 24mA 24mA
Max Propagation Delay @ V, Max CL 7ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup 7 ns
Trigger Type Positive Edge
Input Capacitance 4pF
Number of Input Lines 2
Count Direction UNIDIRECTIONAL
Clock Edge Trigger Type Positive Edge
Height 2.65mm
Length 12.8mm
Width 7.5mm
Thickness 2.35mm
Radiation Hardening No
RoHS Status ROHS3 Compliant
Lead Free Lead Free
Factory Lead Time 6 Weeks
Lifecycle Status ACTIVE (Last Updated: 2 days ago)
Contact Plating Gold
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 20-SOIC (0.295, 7.50mm Width)
Number of Pins 20
Weight 500.709277mg
Operating Temperature -40°C~85°C TA
Packaging Cut Tape (CT)
Series 74LVC
JESD-609 Code e4
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
ECCN Code EAR99
Type D-Type
Subcategory FF/Latches
Packing Method TR
Technology CMOS
Voltage - Supply 1.65V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 1.8V
Base Part Number 74LVC374
Function Standard
Output Type Tri-State, Non-Inverted
Number of Elements 1
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 3.6V
Power Supplies 3.3V
Number of Circuits 8
Load Capacitance 50pF
Number of Ports 2

SN74LVC374ADWR Overview


It is packaged in the way of 20-SOIC (0.295, 7.50mm Width). As part of the package Cut Tape (CT), it is embedded. Tri-State, Non-Invertedis the output configured for it. Positive Edgeis the trigger it is configured with. This electronic part is mounted in the way of Surface Mount. The supply voltage is set to 1.65V~3.6V. -40°C~85°C TAis the operating temperature. This logic flip flop is classified as type D-Type. In this case, it is a type of FPGA belonging to the 74LVC series. You should not exceed 100MHzin the output frequency of the device. A total of 1elements are contained within it. In 20terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. The 74LVC374 family contains this object. An input voltage of 1.8Vpowers the D latch. This JK flip flop has a 4pFfarad input capacitance. LVC/LCX/Zis the family of this D flip flop. It is mounted in the way of Surface Mount. It is designed with 20 pins. This device exhibits a clock edge trigger type of Positive Edge. The RS flip flops belongs to FF/Latches base part number. An electronic part with 8bits has been designed. In this case, the maximum supply voltage (Vsup) reaches 3.6V. Despite its superior flexibility, it relies on 8 circuits to achieve it. As a result of its reliable performance, this T flip flop is suitable for TR. A total of 3.3V power supplies are needed to run it. There are 2 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. As a result of its output current of 24mA, it is very flexible in terms of design. As of now, there are 2input lines. Quiescent current is consumed by the D latch in the amount of 10μA.

SN74LVC374ADWR Features


Cut Tape (CT) package
74LVC series
20 pins
8 Bits
3.3V power supplies

SN74LVC374ADWR Applications


There are a lot of Texas Instruments SN74LVC374ADWR Flip Flops applications.

  • High Performance Logic for test systems
  • Cold spare funcion
  • Buffered Clock
  • Frequency Divider circuits
  • Set-reset capability
  • Consumer
  • Frequency division
  • Balanced 24 mA output drivers
  • Asynchronous counter
  • Guaranteed simultaneous switching noise level
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