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SN74LVC1G74RSE2

1.65V~5.5V 200MHz 1 Bit D-Type Flip Flop QUAD 74LVC1G74 8 Pins 10μA 74LVC Series 8-UFQFN

Manufacturer: Texas Instruments
Origchip NO: 815-SN74LVC1G74RSE2
Package: 8-UFQFN
Datasheet: -
Stock: 493
Description: 1.65V~5.5V 200MHz 1 Bit D-Type Flip Flop QUAD 74LVC1G74 8 Pins 10μA 74LVC Series 8-UFQFN(Kg)

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Details

Tags

Parameters
Factory Lead Time	6 Weeks
Lifecycle Status	ACTIVE (Last Updated: 5 days ago)
Mounting Type	Surface Mount
Package / Case	8-UFQFN
Surface Mount	YES
Number of Pins	8
Weight	5.301361mg
Operating Temperature	-40°C~85°C TA
Packaging	Cut Tape (CT)
Series	74LVC
JESD-609 Code	e4
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	8
ECCN Code	EAR99
Type	D-Type
Terminal Finish	Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory	FF/Latches
Packing Method	TR
Technology	CMOS
Voltage - Supply	1.65V~5.5V
Terminal Position	QUAD
Peak Reflow Temperature (Cel)	260
Supply Voltage	1.8V
Terminal Pitch	0.5mm
Base Part Number	74LVC1G74
Function	Set(Preset) and Reset
Output Type	Differential
Polarity	Non-Inverting
Supply Voltage-Max (Vsup)	5.5V
Power Supplies	3.3V
Number of Circuits	1
Number of Bits	1
Clock Frequency	200MHz
Propagation Delay	4.4 ns
Turn On Delay Time	1.6 ns
Family	LVC/LCX/Z
Logic Function	AND, D-Type
Current - Quiescent (Iq)	10μA
Current - Output High, Low	32mA 32mA
Number of Gates	2
Max Propagation Delay @ V, Max CL	4.4ns @ 5V, 50pF
Prop. Delay@Nom-Sup	5.9 ns
Trigger Type	Positive Edge
Input Capacitance	5pF
Clock Edge Trigger Type	Positive Edge
Height	600μm
Length	1.5mm
Width	1.5mm
Thickness	550μm
Radiation Hardening	No
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

SN74LVC1G74RSE2 Overview

The flip flop is packaged in 8-UFQFN. D flip flop is embedded in the Cut Tape (CT) package. This output is configured with Differential. There is a trigger configured with Positive Edge. Surface Mountmounts this electrical part. A 1.65V~5.5Vsupply voltage is required for it to operate. In the operating environment, the temperature is -40°C~85°C TA. A flip flop of this type is classified as a D-Type. In FPGA terms, D flip flop is a type of 74LVCseries FPGA. Its output frequency should not exceed 200MHz Hz. There is a consumption of 10μAof quiescent energy. There have been 8 terminations. It is a member of the 74LVC1G74 family. Power is supplied from a voltage of 1.8V volts. JK flip flop input capacitance is 5pF farads. It belongs to the family of electronic devices known as LVC/LCX/Z. This board is designed with 8pins on it. In this device, the clock edge trigger type is Positive Edge. There is a FF/Latchesbase part number assigned to the RS flip flops. An electronic part designed with 1bits is used in this application. As soon as 5.5Vis reached, Vsup reaches its maximum value. 1 circuits are used to achieve its superior flexibility. On the basis of its reliable performance, this D flip flop is well suited for use with TR. There are 3.3V power supplies attached to it. 2 gates constitute its basic building block.