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SN74LVC1G175DBVT

1.65V~5.5V 175MHz 1 Bit D-Type Flip Flop DUAL 74LVC1G175 6 Pins 10μA 74LVC Series SOT-23-6

Manufacturer: Texas Instruments
Origchip NO: 815-SN74LVC1G175DBVT
Package: SOT-23-6
Datasheet: PDF
Stock: 619
Description: 1.65V~5.5V 175MHz 1 Bit D-Type Flip Flop DUAL 74LVC1G175 6 Pins 10μA 74LVC Series SOT-23-6(Kg)

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Details

Tags

Parameters
Factory Lead Time	6 Weeks
Lifecycle Status	ACTIVE (Last Updated: 6 days ago)
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	SOT-23-6
Number of Pins	6
Weight	6.492041mg
Operating Temperature	-40°C~125°C TA
Packaging	Tape & Reel (TR)
Series	74LVC
JESD-609 Code	e4
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	6
ECCN Code	EAR99
Type	D-Type
Terminal Finish	Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory	FF/Latches
Packing Method	TR
Technology	CMOS
Voltage - Supply	1.65V~5.5V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	1.8V
Terminal Pitch	0.95mm
Base Part Number	74LVC1G175
Function	Reset
Output Type	Non-Inverted
Polarity	Non-Inverting
Supply Voltage-Max (Vsup)	5.5V
Power Supplies	3.3V
Number of Circuits	1
Load Capacitance	50pF
Output Current	32mA
Number of Bits	1
Clock Frequency	175MHz
Propagation Delay	13.4 ns
Turn On Delay Time	1 ns
Family	LVC/LCX/Z
Current - Quiescent (Iq)	10μA
Output Characteristics	3-STATE
Current - Output High, Low	32mA 32mA
Max I(ol)	0.032 A
Max Propagation Delay @ V, Max CL	5ns @ 5V, 50pF
Prop. Delay@Nom-Sup	5.7 ns
Trigger Type	Positive Edge
Input Capacitance	3pF
Clock Edge Trigger Type	Positive Edge
Height	1.45mm
Length	2.9mm
Width	1.6mm
Thickness	1.2mm
Radiation Hardening	No
REACH SVHC	No SVHC
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

SN74LVC1G175DBVT Overview

It is packaged in the way of SOT-23-6. As part of the package Tape & Reel (TR), it is embedded. Currently, the output is configured to use Non-Inverted. It is configured with a trigger that uses Positive Edge. There is an electric part mounted in the way of Surface Mount. A 1.65V~5.5Vsupply voltage is required for it to operate. A temperature of -40°C~125°C TAis used in the operation. A flip flop of this type is classified as a D-Type. This type of FPGA is a part of the 74LVC series. You should not exceed 175MHzin its output frequency. There is a consumption of 10μAof quiescent energy. There have been 6 terminations. This D latch belongs to the family of 74LVC1G175. It is powered by a voltage of 1.8V . A JK flip flop with a 3pFfarad input capacitance is used here. The electronic device belongs to the LVC/LCX/Zfamily. The electronic part is mounted in the way of Surface Mount. A total of 6pins are provided on this board. This device's clock edge trigger type is Positive Edge. The part is included in FF/Latches. It is designed with a number of bits of 1. As soon as Vsup reaches 5.5V, the maximum supply voltage is reached. Due to its superior flexibility, it uses 1 circuits. Considering its reliability, this T flip flop is well suited for TR. A power supply of 3.3Vis required to operate it. As a result of its output current of 32mA, it is very flexible in terms of design.