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SN74LVC16374AGRDR

1.65V~3.6V 150MHz 16 Bit D-Type Flip Flop BOTTOM 74LVC16374 54 Pins 20μA 74LVC Series 54-TFBGA

Manufacturer: Texas Instruments
Origchip NO: 815-SN74LVC16374AGRDR
Package: 54-TFBGA
Datasheet: PDF
Stock: 874
Description: 1.65V~3.6V 150MHz 16 Bit D-Type Flip Flop BOTTOM 74LVC16374 54 Pins 20μA 74LVC Series 54-TFBGA(Kg)

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Details

Tags

Parameters
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	54-TFBGA
Number of Pins	54
Weight	99.705273mg
Operating Temperature	-40°C~85°C TA
Packaging	Cut Tape (CT)
Series	74LVC
JESD-609 Code	e0
Pbfree Code	no
Part Status	Obsolete
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	54
Type	D-Type
Terminal Finish	Tin/Lead (Sn/Pb)
Subcategory	FF/Latches
Packing Method	TAPE AND REEL
Technology	CMOS
Voltage - Supply	1.65V~3.6V
Terminal Position	BOTTOM
Terminal Form	BALL
Peak Reflow Temperature (Cel)	240
Supply Voltage	1.8V
Reach Compliance Code	not_compliant
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
Base Part Number	74LVC16374
Function	Standard
Qualification Status	Not Qualified
Output Type	Tri-State, Non-Inverted
Number of Elements	2
Polarity	Non-Inverting
Supply Voltage-Max (Vsup)	3.6V
Power Supplies	3.3V
Load Capacitance	50pF
Number of Ports	2
Output Current	24mA
Number of Bits	16
Clock Frequency	150MHz
Propagation Delay	4.9 ns
Turn On Delay Time	1.5 ns
Family	LVC/LCX/Z
Logic Function	Flip-Flop
Current - Quiescent (Iq)	20μA
Output Characteristics	3-STATE
Current - Output High, Low	24mA 24mA
Number of Bits per Element	8
Max Propagation Delay @ V, Max CL	4.5ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup	4.5 ns
Trigger Type	Positive Edge
Input Capacitance	5pF
Number of Input Lines	1
Clock Edge Trigger Type	Positive Edge
Width	5.5mm
RoHS Status	ROHS3 Compliant
Lead Free	Contains Lead

SN74LVC16374AGRDR Overview

54-TFBGAis the way it is packaged. You can find it in the Cut Tape (CT)package. T flip flop is configured with an output of Tri-State, Non-Inverted. This trigger is configured to use Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. A voltage of 1.65V~3.6Vis used as the supply voltage. A temperature of -40°C~85°C TAis used in the operation. This D latch has the type D-Type. In terms of FPGAs, it belongs to the 74LVC series. You should not exceed 150MHzin its output frequency. D latch consists of 2 elements. It consumes 20μA of quiescent current without being affected by external factors. In 54terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. It is a member of the 74LVC16374 family. An input voltage of 1.8Vpowers the D latch. Input capacitance of this device is 5pF farads. The electronic device belongs to the LVC/LCX/Zfamily. It is mounted in the way of Surface Mount. As you can see from the design, it has pins with 54. Its clock edge trigger type is Positive Edge. This device is part of the FF/Latchesbase part number family. Flip flops designed with 16bits are used in this part. It reaches 3.6Vwhen the maximum supply voltage (Vsup) is applied. As a result of its reliability, this D flip flop is ideally suited for TAPE AND REEL. The system runs on a power supply of 3.3V watts. A D flip flop with 2embedded ports is available. The output current of 24mA makes it feature maximum design flexibility. A total of 1input lines have been provided.