All Products

View All >>

SN74LV574APWR

2V~5.5V 205MHz 8 Bit D-Type Flip Flop DUAL 74LV574 20 Pins 74LV Series 20-TSSOP (0.173, 4.40mm Width)

Manufacturer: Texas Instruments
Origchip NO: 815-SN74LV574APWR
Package: 20-TSSOP (0.173, 4.40mm Width)
Datasheet: PDF
Stock: 171
Description: 2V~5.5V 205MHz 8 Bit D-Type Flip Flop DUAL 74LV574 20 Pins 74LV Series 20-TSSOP (0.173, 4.40mm Width)(Kg)

Purchase & Inquiry

Transport

Purchase

You may place an order without registering to XINJIADA.
We strongly suggest you sign in before purchasing as you can track your order in real time.

Means of Payment

For your convenience, we accept multiple payment methods in USD, including PayPal, Credit Card, and wire transfer.

RFQ (Request for Quotations)

It is recommended to request for quotations to get the latest prices and inventories about the part.
Our sales will reply to your request by email within 24 hours.

IMPORTANT NOTICE

1. You'll receive an order information email in your inbox. (Please remember to check the spam folder if you didn't hear from us).
2. Since inventories and prices may fluctuate to some extent, the sales manager is going to reconfirm the order and let you know if there are any updates.

Shipping Cost

Shipping starts at $40, but some countries will exceed $40. For example (South Africa, Brazil, India, Pakistan, Israel, etc.)
The basic freight (for package ≤0.5kg or corresponding volume) depends on the time zone and country.

Shipping Method

Currently, our products are shipped through DHL, FedEx, SF, and UPS.

Delivery Time

Once the goods are shipped, estimated delivery time depends on the shipping methods you chose:

FedEx International, 5-7 business days.

The following are some common countries' logistic time.
transport

Details

Tags

Parameters
Factory Lead Time	6 Weeks
Lifecycle Status	ACTIVE (Last Updated: 2 days ago)
Contact Plating	Gold
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	20-TSSOP (0.173, 4.40mm Width)
Number of Pins	20
Weight	76.997305mg
Operating Temperature	-40°C~85°C TA
Packaging	Cut Tape (CT)
Series	74LV
JESD-609 Code	e4
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	20
ECCN Code	EAR99
Type	D-Type
Subcategory	FF/Latches
Packing Method	TR
Technology	CMOS
Voltage - Supply	2V~5.5V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	2.5V
Terminal Pitch	0.65mm
Base Part Number	74LV574
Function	Standard
Output Type	Tri-State, Non-Inverted
Number of Elements	1
Polarity	Non-Inverting
Supply Voltage-Max (Vsup)	5.5V
Supply Voltage-Min (Vsup)	2V
Number of Circuits	8
Load Capacitance	50pF
Number of Ports	2
Output Current	16mA
Number of Bits	8
Clock Frequency	205MHz
Propagation Delay	19.6 ns
Quiescent Current	20μA
Turn On Delay Time	4.8 ns
Family	LV/LV-A/LVX/H
Logic Function	D-Type, Flip-Flop
Current - Output High, Low	16mA 16mA
Max Propagation Delay @ V, Max CL	5.7ns @ 5V, 50pF
Trigger Type	Positive Edge
Input Capacitance	1.8pF
Power Supply Current-Max (ICC)	0.02mA
Number of Input Lines	3
Count Direction	UNIDIRECTIONAL
Clock Edge Trigger Type	Positive Edge
Translation	N/A
Max Frequency@Nom-Sup	45000000Hz
Height	1.2mm
Length	6.5mm
Width	4.4mm
Thickness	1mm
Radiation Hardening	No
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

SN74LV574APWR Overview

The package is in the form of 20-TSSOP (0.173, 4.40mm Width). It is included in the package Cut Tape (CT). T flip flop uses Tri-State, Non-Invertedas its output configuration. JK flip flop uses Positive Edgeas the trigger. The electronic part is mounted in the way of Surface Mount. A voltage of 2V~5.5Vis required for its operation. The operating temperature is -40°C~85°C TA. It belongs to the type D-Typeof flip flops. This type of FPGA is a part of the 74LV series. It should not exceed 205MHzin its output frequency. In total, it contains 1 elements. A total of 20 terminations have been made. The 74LV574family includes it. A voltage of 2.5V is used as the power supply for this D latch. This JK flip flop has a 1.8pFfarad input capacitance. It is a member of the LV/LV-A/LVX/Hfamily of D flip flop. In this case, the electronic component is mounted in the way of Surface Mount. The 20pins are designed into the board. This device has the clock edge trigger type of Positive Edge. This part is included in FF/Latches. There are 8bits in its design. Vsup reaches its maximum value at 5.5V. The supply voltage (Vsup) should be kept above 2V for normal operation. Its flexibility is enhanced by 8 circuits. In view of its reliability, this D flip flop is a good fit for TR. The flip flop contains 2ports. This T flip flop features a maximum design flexibility due to its output current of 16mA. This input has 3lines. It consumes a total of 20μA quiescent current at any given time.