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SN74LV374ADWR

2V~5.5V 170MHz 8 Bit D-Type Flip Flop DUAL 74LV374 20 Pins 20μA 74LV Series 20-SOIC (0.295, 7.50mm Width)

Manufacturer: Texas Instruments
Origchip NO: 815-SN74LV374ADWR
Package: 20-SOIC (0.295, 7.50mm Width)
Datasheet: -
Stock: 790
Description: 2V~5.5V 170MHz 8 Bit D-Type Flip Flop DUAL 74LV374 20 Pins 20μA 74LV Series 20-SOIC (0.295, 7.50mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time	6 Weeks
Lifecycle Status	ACTIVE (Last Updated: 4 days ago)
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	20-SOIC (0.295, 7.50mm Width)
Number of Pins	20
Weight	500.709277mg
Operating Temperature	-40°C~85°C TA
Packaging	Tape & Reel (TR)
Series	74LV
JESD-609 Code	e4
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	20
ECCN Code	EAR99
Type	D-Type
Terminal Finish	Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory	FF/Latches
Packing Method	TR
Technology	CMOS
Voltage - Supply	2V~5.5V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	2.5V
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
Base Part Number	74LV374
Function	Standard
Qualification Status	Not Qualified
Output Type	Tri-State, Non-Inverted
Number of Elements	1
Polarity	Non-Inverting
Supply Voltage-Max (Vsup)	5.5V
Power Supplies	3.3V
Supply Voltage-Min (Vsup)	2V
Number of Circuits	8
Load Capacitance	50pF
Number of Ports	2
Output Current	16mA
Number of Bits	8
Clock Frequency	170MHz
Propagation Delay	19.3 ns
Turn On Delay Time	4.9 ns
Family	LV/LV-A/LVX/H
Logic Function	D-Type, Flip-Flop
Current - Quiescent (Iq)	20μA
Output Characteristics	3-STATE
Current - Output High, Low	16mA 16mA
Max Propagation Delay @ V, Max CL	10.1ns @ 5V, 50pF
Trigger Type	Positive Edge
Input Capacitance	2.9pF
Number of Input Lines	2
Count Direction	UNIDIRECTIONAL
Clock Edge Trigger Type	Positive Edge
Translation	N/A
Max Frequency@Nom-Sup	50000000Hz
Height	2.65mm
Length	12.8mm
Width	7.5mm
Thickness	2.35mm
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

SN74LV374ADWR Overview

It is embeded in 20-SOIC (0.295, 7.50mm Width) case. It is included in the package Tape & Reel (TR). The output it is configured with uses Tri-State, Non-Inverted. The trigger it is configured with uses Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. A voltage of 2V~5.5Vis used as the supply voltage. It is operating at a temperature of -40°C~85°C TA. A flip flop of this type is classified as a D-Type. JK flip flop is a part of the 74LVseries of FPGAs. Its output frequency should not exceed 170MHz Hz. The list contains 1 elements. As a result, it consumes 20μA quiescent current and is not affected by external forces. There are 20 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. D latch belongs to the 74LV374 family. The power supply voltage is 2.5V. This T flip flop has a capacitance of 2.9pF farads at the input. An electronic device belonging to the family LV/LV-A/LVX/Hcan be found here. It is mounted by the way of Surface Mount. There are 20pins on it. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. This part is included in FF/Latches. This flip flop is designed with 8 Bits. 5.5Vis the maximum supply voltage (Vsup). If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 2V. Using 8 circuits, it is highly flexible. A reliable performance of this D flip flop makes it well suited for use in TR. A power supply of 3.3Vis required to operate it. The flip flop contains 2ports. The 16mA output current allows it to be designed with the greatest amount of flexibility. As of now, there are 2input lines.