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SN74LV374ADBR

2V~5.5V 205MHz 8 Bit D-Type Flip Flop DUAL 74LV374 20 Pins 74LV Series 20-SSOP (0.209, 5.30mm Width)

Manufacturer: Texas Instruments
Origchip NO: 815-SN74LV374ADBR
Package: 20-SSOP (0.209, 5.30mm Width)
Datasheet: PDF
Stock: 875
Description: 2V~5.5V 205MHz 8 Bit D-Type Flip Flop DUAL 74LV374 20 Pins 74LV Series 20-SSOP (0.209, 5.30mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time	6 Weeks
Lifecycle Status	ACTIVE (Last Updated: 3 days ago)
Contact Plating	Gold
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	20-SSOP (0.209, 5.30mm Width)
Number of Pins	20
Weight	156.687814mg
Operating Temperature	-40°C~85°C TA
Packaging	Cut Tape (CT)
Series	74LV
JESD-609 Code	e4
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	20
Termination	SMD/SMT
ECCN Code	EAR99
Type	D-Type
Subcategory	FF/Latches
Packing Method	TR
Technology	CMOS
Voltage - Supply	2V~5.5V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	2.5V
Terminal Pitch	0.65mm
Base Part Number	74LV374
Function	Standard
Output Type	Tri-State, Non-Inverted
Operating Supply Voltage	5V
Number of Elements	1
Polarity	Non-Inverting
Power Supplies	3.3V
Supply Voltage-Min (Vsup)	2V
Number of Circuits	8
Load Capacitance	50pF
Number of Ports	2
Output Current	16mA
Number of Bits	8
Clock Frequency	205MHz
Propagation Delay	23 ns
Quiescent Current	20μA
Turn On Delay Time	4.9 ns
Family	LV/LV-A/LVX/H
Logic Function	D-Type, Flip-Flop
Output Characteristics	3-STATE
Current - Output High, Low	16mA 16mA
Max Propagation Delay @ V, Max CL	10.1ns @ 5V, 50pF
Trigger Type	Positive Edge
Input Capacitance	2.9pF
Number of Input Lines	2
Count Direction	UNIDIRECTIONAL
Clock Edge Trigger Type	Positive Edge
Translation	N/A
Max Frequency@Nom-Sup	50000000Hz
Height	2mm
Length	7.2mm
Width	5.3mm
Thickness	1.95mm
Radiation Hardening	No
REACH SVHC	No SVHC
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

SN74LV374ADBR Overview

The package is in the form of 20-SSOP (0.209, 5.30mm Width). You can find it in the Cut Tape (CT)package. There is a Tri-State, Non-Invertedoutput configured with it. In the configuration of the trigger, Positive Edgeis used. Surface Mountis in the way of this electric part. The JK flip flop operates at 2V~5.5Vvolts. In the operating environment, the temperature is -40°C~85°C TA. This electronic flip flop is of type D-Type. In this case, it is a type of FPGA belonging to the 74LV series. You should not exceed 205MHzin its output frequency. In total, it contains 1 elements. It has been determined that there have been 20 terminations. D latch belongs to the 74LV374 family. Power is provided by a 2.5V supply. There is 2.9pF input capacitance for this T flip flop. Electronic devices of this type belong to the LV/LV-A/LVX/Hfamily. A part of the electronic system is mounted in the way of Surface Mount. The electronic flip flop is designed with pins 20. The clock edge trigger type for this device is Positive Edge. The part is included in FF/Latches. An electronic part with 8bits has been designed. Keeping the supply voltage (Vsup) above 2V is necessary for normal operation. Due to its superior flexibility, it uses 8 circuits. In light of its reliable performance, this T flip flop is well suited for TR. The power supply is 3.3V. A total of 2ports are embedded in the D flip flop. It is recommended that the supply voltage be kept at 5Vto maximize efficiency. In addition to its maximum design flexibility, the output current of the T flip flop is 16mA. Currently, there are 2 input lines present. In terms of quiescent current, it consumes 20μA .