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SN74LV273APWR

2V~5.5V 160MHz 8 Bit D-Type Flip Flop DUAL 74LV273 20 Pins 20μA 74LV Series 20-TSSOP (0.173, 4.40mm Width)

Manufacturer: Texas Instruments
Origchip NO: 815-SN74LV273APWR
Package: 20-TSSOP (0.173, 4.40mm Width)
Datasheet: -
Stock: 320
Description: 2V~5.5V 160MHz 8 Bit D-Type Flip Flop DUAL 74LV273 20 Pins 20μA 74LV Series 20-TSSOP (0.173, 4.40mm Width)(Kg)

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Details

Tags

Parameters
Subcategory	FF/Latches
Packing Method	TR
Technology	CMOS
Voltage - Supply	2V~5.5V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	2.5V
Terminal Pitch	0.65mm
Base Part Number	74LV273
Function	Master Reset
Output Type	Non-Inverted
Number of Elements	1
Polarity	Non-Inverting
Supply Voltage-Max (Vsup)	5.5V
Power Supplies	3.3V
Supply Voltage-Min (Vsup)	2V
Number of Circuits	8
Load Capacitance	50pF
Output Current	25mA
Number of Bits	8
Clock Frequency	160MHz
Propagation Delay	22.1 ns
Turn On Delay Time	4.8 ns
Family	LV/LV-A/LVX/H
Logic Function	D-Type, Flip-Flop
Current - Quiescent (Iq)	20μA
Current - Output High, Low	12mA 12mA
Max Propagation Delay @ V, Max CL	10.5ns @ 5V, 50pF
Trigger Type	Positive Edge
Input Capacitance	2pF
Number of Input Lines	2
Clock Edge Trigger Type	Positive Edge
Max Frequency@Nom-Sup	45000000Hz
Height	1.2mm
Length	6.5mm
Width	4.4mm
Thickness	1mm
Radiation Hardening	No
REACH SVHC	No SVHC
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free
Factory Lead Time	6 Weeks
Lifecycle Status	ACTIVE (Last Updated: 1 day ago)
Contact Plating	Gold
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	20-TSSOP (0.173, 4.40mm Width)
Number of Pins	20
Weight	76.997305mg
Operating Temperature	-40°C~125°C TA
Packaging	Tape & Reel (TR)
Series	74LV
JESD-609 Code	e3
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	20
ECCN Code	EAR99
Type	D-Type
Terminal Finish	Matte Tin (Sn)

SN74LV273APWR Overview

It is embeded in 20-TSSOP (0.173, 4.40mm Width) case. D flip flop is embedded in the Tape & Reel (TR) package. There is a Non-Invertedoutput configured with it. In the configuration of the trigger, Positive Edgeis used. It is mounted in the way of Surface Mount. A 2V~5.5Vsupply voltage is required for it to operate. It is at -40°C~125°C TAdegrees Celsius that the system is operating. There is D-Type type of electronic flip flop associated with this device. JK flip flop is a part of the 74LVseries of FPGAs. A frequency of 160MHzshould not be exceeded by its output. A total of 1elements are contained within it. As a result, it consumes 20μA quiescent current and is not affected by external forces. In 20terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. It is a member of the 74LV273 family. Power is supplied from a voltage of 2.5V volts. JK flip flop input capacitance is 2pF farads. It belongs to the family of electronic devices known as LV/LV-A/LVX/H. Electronic part Surface Mountis mounted in the way. This board is designed with 20pins on it. It has a clock edge trigger type of Positive Edge. There is a base part number FF/Latchesfor the RS flip flops. An electronic part designed with 8bits is used in this application. Vsup reaches its maximum value at 5.5V. For normal operation, the supply voltage (Vsup) should be kept above 2V. 8 circuits are used to achieve its superior flexibility. In view of its reliability, this D flip flop is a good fit for TR. A total of 3.3V power supplies are needed to run it. This T flip flop features a maximum design flexibility due to its output current of 25mA. It is reported that there are 2 input lines.