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SN74HC109NG4

2V~6V 60MHz JK Type Flip Flop 74HC109 4μA 74HC Series 16-DIP (0.300, 7.62mm)


  • Manufacturer: Texas Instruments
  • Origchip NO: 815-SN74HC109NG4
  • Package: 16-DIP (0.300, 7.62mm)
  • Datasheet: -
  • Stock: 937
  • Description: 2V~6V 60MHz JK Type Flip Flop 74HC109 4μA 74HC Series 16-DIP (0.300, 7.62mm)(Kg)

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Details

Tags

Parameters
Factory Lead Time 6 Weeks
Mounting Type Through Hole
Package / Case 16-DIP (0.300, 7.62mm)
Operating Temperature -40°C~85°C TA
Packaging Tube
Series 74HC
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Type JK Type
Voltage - Supply 2V~6V
Base Part Number 74HC109
Function Set(Preset) and Reset
Output Type Differential
Number of Elements 2
Clock Frequency 60MHz
Current - Quiescent (Iq) 4μA
Current - Output High, Low 5.2mA 5.2mA
Number of Bits per Element 1
Max Propagation Delay @ V, Max CL 30ns @ 6V, 50pF
Trigger Type Positive Edge
Input Capacitance 3pF
RoHS Status ROHS3 Compliant

SN74HC109NG4 Overview


16-DIP (0.300, 7.62mm)is the way it is packaged. D flip flop is embedded in the Tube package. Currently, the output is configured to use Differential. This trigger uses the value Positive Edge. This electronic part is mounted in the way of Through Hole. A voltage of 2V~6Vis required for its operation. A temperature of -40°C~85°C TAis considered to be the operating temperature. JK Typedescribes this flip flop. In terms of FPGAs, it belongs to the 74HC series. Its output frequency should not exceed 60MHz Hz. A total of 2 elements are present. There is 4μA quiescent consumption. The 74HC109 family contains this object. JK flip flop input capacitance is 3pF farads.

SN74HC109NG4 Features


Tube package
74HC series

SN74HC109NG4 Applications


There are a lot of Texas Instruments SN74HC109NG4 Flip Flops applications.

  • Divide a clock signal by 2 or 4
  • Guaranteed simultaneous switching noise level
  • Shift Registers
  • Computing
  • ESD performance
  • Computers
  • Bounce elimination switch
  • Latch
  • 2 – Bit synchronous counter
  • High Performance Logic for test systems
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