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SN74BCT29825DW

4.5V~5.5V 125MHz D-Type Flip Flop DUAL 16mA 74BCT Series 24-SOIC (0.295, 7.50mm Width)

Manufacturer: Rochester Electronics, LLC
Origchip NO: 699-SN74BCT29825DW
Package: 24-SOIC (0.295, 7.50mm Width)
Datasheet: PDF
Stock: 862
Description: 4.5V~5.5V 125MHz D-Type Flip Flop DUAL 16mA 74BCT Series 24-SOIC (0.295, 7.50mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type	Surface Mount
Package / Case	24-SOIC (0.295, 7.50mm Width)
Surface Mount	YES
Operating Temperature	0°C~70°C TA
Packaging	Tube
Series	74BCT
JESD-609 Code	e4
Pbfree Code	yes
Part Status	Obsolete
Moisture Sensitivity Level (MSL)	3 (168 Hours)
Number of Terminations	24
Type	D-Type
Terminal Finish	NICKEL PALLADIUM GOLD
Additional Feature	WITH CLEAR AND CLOCK ENABLE; WITH TRIPLE OUTPUT ENABLE
Technology	BICMOS
Voltage - Supply	4.5V~5.5V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	5V
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
JESD-30 Code	R-PDSO-G24
Function	Master Reset
Qualification Status	COMMERCIAL
Output Type	Tri-State, Non-Inverted
Number of Elements	1
Supply Voltage-Max (Vsup)	5.5V
Supply Voltage-Min (Vsup)	4.5V
Number of Ports	2
Clock Frequency	125MHz
Family	BCT/FBT
Current - Quiescent (Iq)	16mA
Output Characteristics	3-STATE
Current - Output High, Low	24mA 48mA
Output Polarity	TRUE
Number of Bits per Element	8
Max Propagation Delay @ V, Max CL	7.8ns @ 5V, 50pF
Trigger Type	Positive Edge
Input Capacitance	5pF
Height Seated (Max)	2.65mm
Width	7.5mm
RoHS Status	ROHS3 Compliant

SN74BCT29825DW Overview

It is embeded in 24-SOIC (0.295, 7.50mm Width) case. Package Tubeembeds it. This output is configured with Tri-State, Non-Inverted. Positive Edgeis the trigger it is configured with. Surface Mountis positioned in the way of this electronic part. Powered by a 4.5V~5.5Vvolt supply, it operates as follows. Temperature is set to 0°C~70°C TA. There is D-Type type of electronic flip flop associated with this device. It belongs to the 74BCTseries of FPGAs. A frequency of 125MHzshould not be exceeded by its output. In total, it contains 1 elements. As a result, it consumes 16mA quiescent current and is not affected by external forces. There are 24 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. The power source is powered by 5V. The input capacitance of this T flip flop is 5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. In this case, the D flip flop belongs to the BCT/FBTfamily. It reaches 5.5Vwhen the maximum supply voltage (Vsup) is applied. For normal operation, the supply voltage (Vsup) should be kept above 4.5V. There are 2 ports embedded in the flip flops. In addition, you can refer to the additinal WITH CLEAR AND CLOCK ENABLE; WITH TRIPLE OUTPUT ENABLE of the D latch.