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SN74AVC16374DGVR

1.4V~3.6V 200MHz 16 Bit D-Type Flip Flop DUAL 74AVC16374 48 Pins 40μA 74AVC Series 48-TFSOP (0.173, 4.40mm Width)

Manufacturer: Texas Instruments
Origchip NO: 815-SN74AVC16374DGVR
Package: 48-TFSOP (0.173, 4.40mm Width)
Datasheet: -
Stock: 894
Description: 1.4V~3.6V 200MHz 16 Bit D-Type Flip Flop DUAL 74AVC16374 48 Pins 40μA 74AVC Series 48-TFSOP (0.173, 4.40mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time	6 Weeks
Lifecycle Status	ACTIVE (Last Updated: 5 days ago)
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	48-TFSOP (0.173, 4.40mm Width)
Number of Pins	48
Weight	123.490523mg
Operating Temperature	-40°C~85°C TA
Packaging	Cut Tape (CT)
Series	74AVC
JESD-609 Code	e4
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	48
ECCN Code	EAR99
Type	D-Type
Terminal Finish	Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory	FF/Latches
Packing Method	TR
Technology	CMOS
Voltage - Supply	1.4V~3.6V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	1.5V
Terminal Pitch	0.4mm
Base Part Number	74AVC16374
Function	Standard
Output Type	Tri-State, Non-Inverted
Number of Elements	2
Polarity	Non-Inverting
Number of Ports	2
Output Current	12mA
Number of Bits	16
Clock Frequency	200MHz
Propagation Delay	9.4 ns
Turn On Delay Time	7.3 ns
Family	AVC
Logic Function	D-Type, Flip-Flop
Current - Quiescent (Iq)	40μA
Current - Output High, Low	12mA 12mA
Number of Bits per Element	8
Max Propagation Delay @ V, Max CL	3.3ns @ 3.3V, 30pF
Trigger Type	Positive Edge
Input Capacitance	3pF
Power Supply Current-Max (ICC)	0.04mA
Number of Input Lines	3
Number of Output Lines	1
Count Direction	UNIDIRECTIONAL
Clock Edge Trigger Type	Positive Edge
Translation	N/A
Height	1.2mm
Length	9.7mm
Width	4.4mm
Thickness	1.05mm
Radiation Hardening	No
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

SN74AVC16374DGVR Overview

48-TFSOP (0.173, 4.40mm Width)is the way it is packaged. D flip flop is included in the Cut Tape (CT)package. The output it is configured with uses Tri-State, Non-Inverted. JK flip flop uses Positive Edgeas the trigger. In this case, the electronic component is mounted in the way of Surface Mount. A voltage of 1.4V~3.6Vis required for its operation. It is at -40°C~85°C TAdegrees Celsius that the system is operating. It belongs to the type D-Typeof flip flops. This type of FPGA is a part of the 74AVC series. A frequency of 200MHzshould be the maximum output frequency. A total of 2 elements are present. This process consumes 40μA quiescents. Currently, there are 48 terminations. The 74AVC16374 family contains it. A voltage of 1.5V is used as the power supply for this D latch. Input capacitance of this device is 3pF farads. AVCis the family of this D flip flop. There is an electronic part mounted in the way of Surface Mount. It is designed with 48 pins. This device's clock edge trigger type is Positive Edge. This device has the base part number FF/Latches. Flip flops designed with 16bits are used in this part. Compared to other similar T flip flops, this device offers reliable performance and is well suited for TR. There are 2 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. This T flip flop features a maximum design flexibility due to its output current of 12mA. There are 1 output Lines, which generate the binary equivalent of the input line whose value is equal to “1” and are available to encode either a decimal or hexadecimal input pattern to typically a binary or “B. C. D” (binary coded decimal) output code. This input has 3lines in it.