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SN74AUP1G74DCURG4

0.8V~3.6V 100MHz 1 Bit D-Type Flip Flop DUAL 74AUP1G74 8 Pins 500nA 74AUP Series 8-VFSOP (0.091, 2.30mm Width)

Manufacturer: Texas Instruments
Origchip NO: 815-SN74AUP1G74DCURG4
Package: 8-VFSOP (0.091, 2.30mm Width)
Datasheet: -
Stock: 870
Description: 0.8V~3.6V 100MHz 1 Bit D-Type Flip Flop DUAL 74AUP1G74 8 Pins 500nA 74AUP Series 8-VFSOP (0.091, 2.30mm Width)(Kg)

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Details

Tags

Parameters
Height	900μm
Length	2.3mm
Width	2mm
Thickness	850μm
Radiation Hardening	No
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free
Factory Lead Time	6 Weeks
Lifecycle Status	ACTIVE (Last Updated: 2 days ago)
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	8-VFSOP (0.091, 2.30mm Width)
Number of Pins	8
Operating Temperature	-40°C~85°C TA
Packaging	Tape & Reel (TR)
Series	74AUP
JESD-609 Code	e4
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	8
Type	D-Type
Terminal Finish	Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory	FF/Latches
Packing Method	TR
Technology	CMOS
Voltage - Supply	0.8V~3.6V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	1.2V
Terminal Pitch	0.5mm
Base Part Number	74AUP1G74
Function	Set(Preset) and Reset
Output Type	Differential
Polarity	Non-Inverting
Supply Voltage-Max (Vsup)	3.6V
Number of Circuits	1
Load Capacitance	30pF
Output Current	4mA
Number of Bits	1
Clock Frequency	100MHz
Propagation Delay	27 ns
Turn On Delay Time	4 ns
Family	AUP/ULP/V
Logic Function	AND, D-Type
Current - Quiescent (Iq)	500nA
Output Characteristics	3-STATE
Current - Output High, Low	4mA 4mA
Max I(ol)	0.004 A
Max Propagation Delay @ V, Max CL	7ns @ 3.3V, 30pF
Trigger Type	Positive Edge
Input Capacitance	1.5pF
Power Supply Current-Max (ICC)	0.0009mA
Clock Edge Trigger Type	Positive Edge
Max Frequency@Nom-Sup	40000000Hz

SN74AUP1G74DCURG4 Overview

The package is in the form of 8-VFSOP (0.091, 2.30mm Width). As part of the package Tape & Reel (TR), it is embedded. It is configured with Differentialas an output. In the configuration of the trigger, Positive Edgeis used. It is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 0.8V~3.6V. In the operating environment, the temperature is -40°C~85°C TA. A flip flop of this type is classified as a D-Type. In this case, it is a type of FPGA belonging to the 74AUP series. A frequency of 100MHzshould not be exceeded by its output. This process consumes 500nA quiescents. It has been determined that there have been 8 terminations. It is a member of the 74AUP1G74 family. It is powered from a supply voltage of 1.2V. There is 1.5pF input capacitance for this T flip flop. This D flip flop belongs to the family of AUP/ULP/V. There is an electronic part mounted in the way of Surface Mount. The electronic flip flop is designed with pins 8. This device has the clock edge trigger type of Positive Edge. This RS flip flops is a part number FF/Latches. An electronic part designed with 1bits is used in this application. As soon as 3.6Vis reached, Vsup reaches its maximum value. The superior flexibility of this circuit is achieved by using 1 circuits. Considering the reliability of this T flip flop, it is well suited for TR. With an output current of 4mA, it is possible to design the device in any way you want.