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SN74ALVTH16374GR

2.3V~2.7V 3V~3.6V 250MHz 16 Bit D-Type Flip Flop DUAL 74ALVTH16374 48 Pins 100μA 74ALVTH Series 48-TFSOP (0.240, 6.10mm Width)

Manufacturer: Texas Instruments
Origchip NO: 815-SN74ALVTH16374GR
Package: 48-TFSOP (0.240, 6.10mm Width)
Datasheet: PDF
Stock: 474
Description: 2.3V~2.7V 3V~3.6V 250MHz 16 Bit D-Type Flip Flop DUAL 74ALVTH16374 48 Pins 100μA 74ALVTH Series 48-TFSOP (0.240, 6.10mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time	6 Weeks
Lifecycle Status	ACTIVE (Last Updated: 3 days ago)
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	48-TFSOP (0.240, 6.10mm Width)
Number of Pins	48
Weight	223.195796mg
Operating Temperature	-40°C~85°C TA
Packaging	Cut Tape (CT)
Series	74ALVTH
JESD-609 Code	e4
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	48
ECCN Code	EAR99
Type	D-Type
Terminal Finish	Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory	FF/Latches
Packing Method	TR
Technology	BICMOS
Voltage - Supply	2.3V~2.7V 3V~3.6V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	2.5V
Terminal Pitch	0.5mm
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
Base Part Number	74ALVTH16374
Function	Standard
Qualification Status	Not Qualified
Output Type	Tri-State, Non-Inverted
Number of Elements	2
Polarity	Non-Inverting
Number of Ports	2
Output Current	64mA
Number of Bits	16
Clock Frequency	250MHz
Propagation Delay	3.2 ns
Turn On Delay Time	1.5 ns
Logic Function	D-Type, Flip-Flop
Current - Quiescent (Iq)	100μA
Current - Output High, Low	8mA 24mA; 32mA 64mA
Max I(ol)	0.064 A
Number of Bits per Element	8
Max Propagation Delay @ V, Max CL	3.2ns @ 3.3V, 50pF
Trigger Type	Positive Edge
Input Capacitance	3.5pF
Power Supply Current-Max (ICC)	5mA
Number of Input Lines	3
Number of Output Lines	1
Count Direction	UNIDIRECTIONAL
Clock Edge Trigger Type	Positive Edge
Translation	N/A
Height	1.2mm
Length	12.5mm
Width	6.1mm
Thickness	1.15mm
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

SN74ALVTH16374GR Overview

The package is in the form of 48-TFSOP (0.240, 6.10mm Width). D flip flop is embedded in the Cut Tape (CT) package. T flip flop is configured with an output of Tri-State, Non-Inverted. This trigger uses the value Positive Edge. The electronic part is mounted in the way of Surface Mount. With a supply voltage of 2.3V~2.7V 3V~3.6V volts, it operates. Temperature is set to -40°C~85°C TA. This electronic flip flop is of type D-Type. JK flip flop belongs to the 74ALVTHseries of FPGAs. A frequency of 250MHzshould not be exceeded by its output. The element count is 2 . During its operation, it consumes 100μA quiescent energy. There are 48 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. The 74ALVTH16374 family contains this object. Power is provided by a 2.5V supply. Its input capacitance is 3.5pF farads. It is mounted in the way of Surface Mount. It is designed with 48 pins. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. It is part of the FF/Latchesbase part number family. An electronic part with 16bits has been designed. Compared to other similar T flip flops, this device offers reliable performance and is well suited for TR. The flip flop contains 2ports. The output current of 64mA makes it feature maximum design flexibility. In order to operate, the chip has 1 output lines. This input has 3lines in it.