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SN74ALVCH16721DLR

1.65V~3.6V 150MHz D-Type Flip Flop DUAL 74ALVCH16721 56 Pins 40μA 74ALVCH Series 56-BSSOP (0.295, 7.50mm Width)

Manufacturer: Texas Instruments
Origchip NO: 815-SN74ALVCH16721DLR
Package: 56-BSSOP (0.295, 7.50mm Width)
Datasheet: -
Stock: 533
Description: 1.65V~3.6V 150MHz D-Type Flip Flop DUAL 74ALVCH16721 56 Pins 40μA 74ALVCH Series 56-BSSOP (0.295, 7.50mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type	Surface Mount
Package / Case	56-BSSOP (0.295, 7.50mm Width)
Number of Pins	56
Weight	694.790113mg
Operating Temperature	-40°C~85°C TA
Packaging	Cut Tape (CT)
Series	74ALVCH
JESD-609 Code	e4
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	56
ECCN Code	EAR99
Type	D-Type
Terminal Finish	Nickel/Palladium/Gold (Ni/Pd/Au)
Additional Feature	WITH CLOCK ENABLE
Subcategory	Bus Driver/Transceiver
Packing Method	TR
Technology	CMOS
Voltage - Supply	1.65V~3.6V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	1.8V
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
Base Part Number	74ALVCH16721
Function	Standard
Qualification Status	Not Qualified
Output Type	Tri-State, Non-Inverted
Polarity	Non-Inverting
Load Capacitance	50pF
Number of Ports	2
Output Current	24mA
Clock Frequency	150MHz
Propagation Delay	5.1 ns
Turn On Delay Time	1 ns
Family	ALVC/VCX/A
Logic Function	D-Type, Flip-Flop
Current - Quiescent (Iq)	40μA
Current - Output High, Low	24mA 24mA
Max I(ol)	0.024 A
Number of Bits per Element	20
Max Propagation Delay @ V, Max CL	4.3ns @ 3.3V, 30pF
Trigger Type	Positive Edge
Input Capacitance	3.5pF
Power Supply Current-Max (ICC)	0.04mA
Number of Input Lines	1
Number of Output Lines	3
Count Direction	UNIDIRECTIONAL
Clock Edge Trigger Type	Positive Edge
Translation	N/A
Height	2.79mm
Length	18.41mm
Width	7.49mm
Thickness	2.59mm
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free
Factory Lead Time	6 Weeks
Lifecycle Status	ACTIVE (Last Updated: 3 days ago)
Mount	Surface Mount

SN74ALVCH16721DLR Overview

The item is packaged in 56-BSSOP (0.295, 7.50mm Width)cases. D flip flop is included in the Cut Tape (CT)package. In the configuration, Tri-State, Non-Invertedis used as the output. This trigger is configured to use Positive Edge. There is an electric part mounted in the way of Surface Mount. A supply voltage of 1.65V~3.6V is required for operation. A temperature of -40°C~85°C TAis used in the operation. Logic flip flops of this type are classified as D-Type. It is a type of FPGA belonging to the 74ALVCH series. This D flip flop should not have a frequency greater than 150MHz. It consumes 40μA of quiescent A total of 56 terminations have been made. You can search similar parts based on 74ALVCH16721. A voltage of 1.8V is used to power it. A 3.5pFfarad input capacitance is provided by this T flip flop. ALVC/VCX/Ais the family of this D flip flop. A part of the electronic system is mounted in the way of Surface Mount. There are 56pins on it. The clock edge trigger type for this device is Positive Edge. It is included in Bus Driver/Transceiver. As a result of its reliability, this D flip flop is ideally suited for TR. There are 2 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. Featuring the maximum design flexibility, it has an output current of 24mA . There are 3 output lines in this JK flip flop. Currently, there are 1 input lines present. Additionally, you may refer to the D latch's additional WITH CLOCK ENABLE.