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SN74ACT564DWR

4.5V~5.5V 90MHz 8 Bit D-Type Flip Flop DUAL 74ACT564 20 Pins 4μA 74ACT Series 20-SOIC (0.295, 7.50mm Width)

Manufacturer: Texas Instruments
Origchip NO: 815-SN74ACT564DWR
Package: 20-SOIC (0.295, 7.50mm Width)
Datasheet: PDF
Stock: 135
Description: 4.5V~5.5V 90MHz 8 Bit D-Type Flip Flop DUAL 74ACT564 20 Pins 4μA 74ACT Series 20-SOIC (0.295, 7.50mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time	6 Weeks
Lifecycle Status	ACTIVE (Last Updated: 2 days ago)
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	20-SOIC (0.295, 7.50mm Width)
Number of Pins	20
Weight	500.709277mg
Operating Temperature	-40°C~85°C TA
Packaging	Tape & Reel (TR)
Series	74ACT
JESD-609 Code	e4
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	20
ECCN Code	EAR99
Type	D-Type
Terminal Finish	Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory	Bus Driver/Transceiver
Packing Method	TR
Technology	CMOS
Voltage - Supply	4.5V~5.5V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	5V
Base Part Number	74ACT564
Function	Standard
Output Type	Tri-State, Inverted
Operating Supply Voltage	5V
Number of Elements	1
Polarity	Inverting
Power Supplies	5V
Number of Circuits	8
Load Capacitance	50pF
Number of Ports	2
Output Current	24mA
Number of Bits	8
Clock Frequency	90MHz
Propagation Delay	11.5 ns
Turn On Delay Time	6.5 ns
Family	ACT
Logic Function	D-Type, Flip-Flop
Current - Quiescent (Iq)	4μA
Current - Output High, Low	24mA 24mA
Max I(ol)	0.024 A
Max Propagation Delay @ V, Max CL	10.5ns @ 5V, 50pF
Trigger Type	Positive Edge
Input Capacitance	4.5pF
Power Supply Current-Max (ICC)	0.04mA
Number of Input Lines	3
Count Direction	UNIDIRECTIONAL
Clock Edge Trigger Type	Positive Edge
Translation	N/A
Height	2.65mm
Length	12.8mm
Width	7.5mm
Thickness	2.35mm
Radiation Hardening	No
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

SN74ACT564DWR Overview

The item is packaged in 20-SOIC (0.295, 7.50mm Width)cases. It is contained within the Tape & Reel (TR)package. The output it is configured with uses Tri-State, Inverted. It is configured with a trigger that uses a value of Positive Edge. Surface Mountis positioned in the way of this electronic part. The JK flip flop operates at a voltage of 4.5V~5.5V. Temperature is set to -40°C~85°C TA. D-Typeis the type of this D latch. FPGAs belonging to the 74ACTseries contain this type of chip. You should not exceed 90MHzin the output frequency of the device. D latch consists of 1 elements. Despite external influences, it consumes 4μAof quiescent current. The number of terminations is 20. Members of the 74ACT564family make up this object. A voltage of 5V provides power to the D latch. The input capacitance of this JK flip flopis 4.5pF farads. ACTis the family of this D flip flop. It is mounted by the way of Surface Mount. As you can see from the design, it has pins with 20. There is a clock edge trigger type of Positive Edgeon this device. The part is included in Bus Driver/Transceiver. The design is based on 8bits. The superior flexibility is achieved through the use of 8 circuits. In light of its reliable performance, this T flip flop is well suited for TR. The D latch operates on 5V volts. The D flip flop is embedded with 2ports. If high efficiency is desired, the supply voltage should be kept at 5V. With a current output of 24mA , it offers maximum design flexibility. It has 3lines.