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SCAN18374TSSC

4.5V~5.5V 100MHz D-Type Flip Flop DUAL 16μA SCAN Series 56-BSSOP (0.295, 7.50mm Width)

Manufacturer: Rochester Electronics, LLC
Origchip NO: 699-SCAN18374TSSC
Package: 56-BSSOP (0.295, 7.50mm Width)
Datasheet: PDF
Stock: 266
Description: 4.5V~5.5V 100MHz D-Type Flip Flop DUAL 16μA SCAN Series 56-BSSOP (0.295, 7.50mm Width)(Kg)

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Details

Tags

Parameters
RoHS Status	ROHS3 Compliant
Mounting Type	Surface Mount
Package / Case	56-BSSOP (0.295, 7.50mm Width)
Surface Mount	YES
Operating Temperature	-40°C~85°C TA
Packaging	Tube
Series	SCAN
JESD-609 Code	e3
Pbfree Code	yes
Part Status	Obsolete
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	56
Type	D-Type
Terminal Finish	MATTE TIN
Technology	CMOS
Voltage - Supply	4.5V~5.5V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	5V
Terminal Pitch	0.635mm
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
JESD-30 Code	R-PDSO-G56
Function	Standard
Qualification Status	Not Qualified
Output Type	Tri-State, Non-Inverted
Number of Elements	2
Supply Voltage-Max (Vsup)	5.5V
Supply Voltage-Min (Vsup)	4.5V
Number of Ports	2
Clock Frequency	100MHz
Current - Quiescent (Iq)	16μA
Output Characteristics	3-STATE
Current - Output High, Low	24mA 48mA
Output Polarity	TRUE
Number of Bits per Element	9
Max Propagation Delay @ V, Max CL	10.3ns @ 5V, 50pF
Trigger Type	Positive Edge
Input Capacitance	4pF
Propagation Delay (tpd)	11.5 ns
Length	18.415mm
Width	7.5mm

SCAN18374TSSC Overview

56-BSSOP (0.295, 7.50mm Width)is the way it is packaged. It is contained within the Tubepackage. Tri-State, Non-Invertedis the output configured for it. The trigger configured with it uses Positive Edge. There is an electric part mounted in the way of Surface Mount. The supply voltage is set to 4.5V~5.5V. A temperature of -40°C~85°C TAis used in the operation. This logic flip flop is classified as type D-Type. In terms of FPGAs, it belongs to the SCAN series. Its output frequency should not exceed 100MHz. In total, it contains 2 elements. T flip flop consumes 16μA quiescent energy. 56terminations have occurred. A voltage of 5V is used as the power supply for this D latch. Its input capacitance is 4pF farads. 5.5Vis the maximum supply voltage (Vsup). It is imperative that the supply voltage (Vsup) is maintained above 4.5Vin order to ensure normal operation. The flip flop contains 2ports.