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MC74ACT574NG

4.5V~5.5V 100MHz D-Type Flip Flop DUAL 8μA 74ACT Series 20-DIP (0.300, 7.62mm)

Manufacturer: Rochester Electronics, LLC
Origchip NO: 699-MC74ACT574NG
Package: 20-DIP (0.300, 7.62mm)
Datasheet: PDF
Stock: 440
Description: 4.5V~5.5V 100MHz D-Type Flip Flop DUAL 8μA 74ACT Series 20-DIP (0.300, 7.62mm)(Kg)

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Details

Tags

Parameters
Surface Mount	NO
Operating Temperature	-40°C~85°C TA
Packaging	Tube
Series	74ACT
JESD-609 Code	e3
Pbfree Code	no
Part Status	Obsolete
Moisture Sensitivity Level (MSL)	3 (168 Hours)
Number of Terminations	20
Type	D-Type
Terminal Finish	MATTE TIN
Technology	CMOS
Voltage - Supply	4.5V~5.5V
Terminal Position	DUAL
Peak Reflow Temperature (Cel)	260
Supply Voltage	5V
Terminal Pitch	2.54mm
Reach Compliance Code	unknown
Time@Peak Reflow Temperature-Max (s)	40
JESD-30 Code	R-PDIP-T20
Function	Standard
Qualification Status	Not Qualified
Output Type	Tri-State, Non-Inverted
Number of Elements	1
Supply Voltage-Max (Vsup)	5.5V
Supply Voltage-Min (Vsup)	4.5V
Number of Ports	2
Clock Frequency	100MHz
Family	ACT
Current - Quiescent (Iq)	8μA
Output Characteristics	3-STATE
Current - Output High, Low	24mA 24mA
Output Polarity	TRUE
Number of Bits per Element	8
Max Propagation Delay @ V, Max CL	11ns @ 5V, 50pF
Trigger Type	Positive Edge
Input Capacitance	4.5pF
Height Seated (Max)	4.57mm
Width	7.62mm
RoHS Status	ROHS3 Compliant
Mounting Type	Through Hole
Package / Case	20-DIP (0.300, 7.62mm)

MC74ACT574NG Overview

The item is packaged in 20-DIP (0.300, 7.62mm)cases. D flip flop is embedded in the Tube package. This output is configured with Tri-State, Non-Inverted. There is a trigger configured with Positive Edge. The electronic part is mounted in the way of Through Hole. The JK flip flop operates with an input voltage of 4.5V~5.5V volts. -40°C~85°C TAis the operating temperature. This logic flip flop is classified as type D-Type. It belongs to the 74ACTseries of FPGAs. A frequency of 100MHzshould not be exceeded by its output. The element count is 1 . It consumes 8μA of quiescent A total of 20terminations have been recorded. It is powered by a voltage of 5V . A JK flip flop with a 4.5pFfarad input capacitance is used here. This D flip flop belongs to the family of ACT. 5.5Vis the maximum supply voltage (Vsup). The supply voltage (Vsup) should be maintained above 4.5V for normal operation. There are 2 ports embedded in the flip flops.