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MC74AC377DW

2V~6V 140MHz D-Type Flip Flop DUAL 8μA 74AC Series 20-SOIC (0.295, 7.50mm Width)

Manufacturer: Rochester Electronics, LLC
Origchip NO: 699-MC74AC377DW
Package: 20-SOIC (0.295, 7.50mm Width)
Datasheet: PDF
Stock: 388
Description: 2V~6V 140MHz D-Type Flip Flop DUAL 8μA 74AC Series 20-SOIC (0.295, 7.50mm Width)(Kg)

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Details

Tags

Parameters
Current - Output High, Low	24mA 24mA
Output Polarity	TRUE
Number of Bits per Element	8
Max Propagation Delay @ V, Max CL	10ns @ 5V, 50pF
Trigger Type	Positive Edge
Input Capacitance	4.5pF
Height Seated (Max)	2.65mm
Width	7.5mm
RoHS Status	Non-RoHS Compliant
Mounting Type	Surface Mount
Package / Case	20-SOIC (0.295, 7.50mm Width)
Surface Mount	YES
Operating Temperature	-40°C~85°C TA
Packaging	Tube
Series	74AC
JESD-609 Code	e0
Pbfree Code	yes
Part Status	Obsolete
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	20
Type	D-Type
Terminal Finish	TIN LEAD
Technology	CMOS
Voltage - Supply	2V~6V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	240
Supply Voltage	5V
Reach Compliance Code	unknown
Time@Peak Reflow Temperature-Max (s)	30
JESD-30 Code	R-PDSO-G20
Function	Standard
Qualification Status	COMMERCIAL
Output Type	Non-Inverted
Number of Elements	1
Supply Voltage-Max (Vsup)	6V
Supply Voltage-Min (Vsup)	2V
Clock Frequency	140MHz
Family	AC
Current - Quiescent (Iq)	8μA

MC74AC377DW Overview

In the form of 20-SOIC (0.295, 7.50mm Width), it has been packaged. It is contained within the Tubepackage. The output it is configured with uses Non-Inverted. This trigger is configured to use Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. The supply voltage is set to 2V~6V. A temperature of -40°C~85°C TAis considered to be the operating temperature. Logic flip flops of this type are classified as D-Type. In terms of FPGAs, it belongs to the 74AC series. A frequency of 140MHzshould be the maximum output frequency. In total, there are 1 elements. Despite external influences, it consumes 8μAof quiescent current. In 20terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. The power supply voltage is 5V. The input capacitance of this T flip flop is 4.5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. In this case, the D flip flop belongs to the ACfamily. It reaches 6Vwhen the supply voltage is maximal (Vsup). If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 2V.