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RFQ (Request for Quotations)It is recommended to request for quotations to get the latest
prices and inventories about the part.
Our sales will reply to
your request by email within 24 hours.
1. You'll receive an order information email in your inbox.
(Please remember to check the spam folder if you didn't hear from us).
2. Since inventories and prices may fluctuate to some
extent, the sales manager is going to reconfirm the order and let you know if there
are any updates.
Shipping starts at $40, but some countries will exceed $40. For
example (South Africa, Brazil, India, Pakistan, Israel, etc.)
The
basic freight (for package ≤0.5kg or corresponding volume) depends on the time zone and
country.
Currently, our products are shipped through DHL, FedEx, SF, and UPS.
Delivery TimeOnce the goods are shipped, estimated delivery time depends on the shipping methods you chose:
FedEx International, 5-7 business days.
The following are some common countries' logistic time.Parameters | |
---|---|
Factory Lead Time | 8 Weeks |
Package / Case | 184-BCQFP |
Operating Temperature | 0°C~70°C TA |
Packaging | Tray |
Published | 1995 |
Series | M680x0 |
Part Status | Obsolete |
Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
Base Part Number | MC68040 |
Speed | 33MHz |
Core Processor | 68040 |
Voltage - I/O | 5.0V |
Number of Cores/Bus Width | 1 Core 32-Bit |
Graphics Acceleration | No |
Additional Interfaces | SCI, SPI |
RoHS Status | ROHS3 Compliant |
The MC68040FE33A is Motorola's third generation of M68000-compatible, high-performance, 32-bit microprocessor. The MC68040FE33A is a virtual memory microprocessor employing multiple concurrent execution units and a highly integrated architecture that provides very high performance in a monolithic HCMOS device. The MC68040FE33A contains dual, independent, demand-paged memory management units (MMUs) for instruction and data stream accesses and independent, 4-Kbyte instruction and data caches.
6-Stage Pipeline, MC68030-Compatible IU
MC68881/MC68882-Compatible FPU
Independent Instruction and Data MMUs
Simultaneously Accessible. 4-Kbyte Physical Instruction Cache and 4-Kbyte Physical Data Cache
Low-Latency Bus Accesses for Reduced Cache Miss Penalty
Multimaster/Multiprocessor Support via Bus Snooping
Concurrent IU, FPU, MMU, and Bus Controller Operation Maximizes Throughput
32-Bit, Nonmultiplexed External Address and Data Buses with Synchronous Interface
User Object-Code Compatible with All Earlier M68000 Microprocessors
4-Gbyte Direct Addressing Range
Automotive
Hybrid,electric&powertrain systems
Industrial
Lighting
Enterprise systems
Datacenter & enterprise computing