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MC14013BF

3V~18V 14MHz D-Type Flip Flop DUAL 4μA 4000B Series 14-SOIC (0.209, 5.30mm Width)

Manufacturer: Rochester Electronics, LLC
Origchip NO: 699-MC14013BF
Package: 14-SOIC (0.209, 5.30mm Width)
Datasheet: PDF
Stock: 106
Description: 3V~18V 14MHz D-Type Flip Flop DUAL 4μA 4000B Series 14-SOIC (0.209, 5.30mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type	Surface Mount
Package / Case	14-SOIC (0.209, 5.30mm Width)
Surface Mount	YES
Operating Temperature	-55°C~125°C TA
Packaging	Tube
Series	4000B
JESD-609 Code	e4
Pbfree Code	yes
Part Status	Obsolete
Moisture Sensitivity Level (MSL)	3 (168 Hours)
Number of Terminations	14
Type	D-Type
Terminal Finish	NICKEL PALLADIUM GOLD
Technology	CMOS
Voltage - Supply	3V~18V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	5V
Reach Compliance Code	unknown
Time@Peak Reflow Temperature-Max (s)	40
Function	Set(Preset) and Reset
Qualification Status	COMMERCIAL
Output Type	Differential
Number of Elements	2
Supply Voltage-Min (Vsup)	3V
Clock Frequency	14MHz
Current - Quiescent (Iq)	4μA
Current - Output High, Low	8.8mA 8.8mA
Output Polarity	COMPLEMENTARY
Number of Bits per Element	1
Max Propagation Delay @ V, Max CL	100ns @ 15V, 50pF
Trigger Type	Positive Edge
Input Capacitance	5pF
Propagation Delay (tpd)	350 ns
fmax-Min	7 MHz
RoHS Status	ROHS3 Compliant

MC14013BF Overview

The package is in the form of 14-SOIC (0.209, 5.30mm Width). You can find it in the Tubepackage. T flip flop uses Differentialas the output. It is configured with the trigger Positive Edge. Surface Mountis occupied by this electronic component. Powered by a 3V~18Vvolt supply, it operates as follows. The operating temperature is -55°C~125°C TA. A flip flop of this type is classified as a D-Type. FPGAs belonging to the 4000Bseries contain this type of chip. You should not exceed 14MHzin the output frequency of the device. The list contains 2 elements. As a result, it consumes 4μA quiescent current and is not affected by external forces. In 14terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. An input voltage of 5Vpowers the D latch. The input capacitance of this T flip flop is 5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. The supply voltage (Vsup) should be kept above 3V for normal operation.