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MC100EP51DG

-3V~-5.5V 3GHz 1 Bit D-Type Flip Flop DUAL 100EP51 8 Pins 45mA 100EP Series 8-SOIC (0.154, 3.90mm Width)

Manufacturer: ON Semiconductor
Origchip NO: 598-MC100EP51DG
Package: 8-SOIC (0.154, 3.90mm Width)
Datasheet: PDF
Stock: 128
Description: -3V~-5.5V 3GHz 1 Bit D-Type Flip Flop DUAL 100EP51 8 Pins 45mA 100EP Series 8-SOIC (0.154, 3.90mm Width)(Kg)

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Details

Tags

Parameters
Package / Case	8-SOIC (0.154, 3.90mm Width)
Number of Pins	8
Operating Temperature	-40°C~85°C TA
Packaging	Tube
Published	2000
Series	100EP
JESD-609 Code	e3
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	8
Type	D-Type
Terminal Finish	Tin (Sn)
Additional Feature	NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V
Subcategory	FF/Latches
Packing Method	RAIL
Technology	ECL
Voltage - Supply	-3V~-5.5V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	3.3V
Time@Peak Reflow Temperature-Max (s)	40
Base Part Number	100EP51
Function	Reset
Output Type	Differential
Operating Supply Voltage	3.3V
Polarity	Non-Inverting
Supply Voltage-Max (Vsup)	5.5V
Power Supplies	-4.5V
Supply Voltage-Min (Vsup)	3V
Number of Circuits	1
Output Current	50mA
Number of Bits	1
Clock Frequency	3GHz
Propagation Delay	500 ps
Turn On Delay Time	375 ps
Logic Function	D-Type, Flip-Flop
Current - Quiescent (Iq)	45mA
Halogen Free	Halogen Free
Prop. Delay@Nom-Sup	0.5 ns
Trigger Type	Positive, Negative
High Level Output Current	-50mA
Low Level Output Current	50mA
Power Supply Current-Max (ICC)	47mA
Clock Edge Trigger Type	Positive Edge
Max Frequency@Nom-Sup	3000000000Hz
Height	1.5mm
Length	5mm
Width	4mm
Radiation Hardening	No
REACH SVHC	No SVHC
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free
Factory Lead Time	4 Weeks
Lifecycle Status	ACTIVE (Last Updated: 4 days ago)
Mount	Surface Mount
Mounting Type	Surface Mount

MC100EP51DG Overview

8-SOIC (0.154, 3.90mm Width)is the packaging method. The package Tubecontains it. There is a Differentialoutput configured with it. The trigger configured with it uses Positive, Negative. There is an electric part mounted in the way of Surface Mount. A voltage of -3V~-5.5Vis required for its operation. Currently, the operating temperature is -40°C~85°C TA. The type of this D latch is D-Type. In FPGA terms, D flip flop is a type of 100EPseries FPGA. It should not exceed 3GHzin terms of its output frequency. As a result, it consumes 45mA quiescent current. 8terminations have occurred. It is a member of the 100EP51 family. An input voltage of 3.3Vpowers the D latch. Surface Mount mounts this electronic component. The 8pins are designed into the board. This device has the clock edge trigger type of Positive Edge. It is part of the FF/Latchesbase part number family. It is designed with a number of bits of 1. It reaches 5.5Vwhen the supply voltage is maximal (Vsup). If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 3V. Despite its superior flexibility, it relies on 1 circuits to achieve it. On the basis of its reliable performance, this D flip flop is well suited for use with RAIL. There are -4.5V power supplies attached to it. In order to ensure high efficiency, the supply voltage should remain at 3.3V. The 50mA output current allows it to be designed with the greatest amount of flexibility. There is also a characteristic of NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V. -50mA is set as the high level output current. There is 50mA output current at the low level.