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EPM3256ATC144-10N

0.5mm PMIC 144 Pin 126.6MHz 3.3V TQFP

Manufacturer: Altera
Origchip NO: 2936-EPM3256ATC144-10N
Package: TQFP
Datasheet: PDF
Stock: 351
Description: 0.5mm PMIC 144 Pin 126.6MHz 3.3V TQFP (Kg)

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Details

Tags

Parameters
Factory Lead Time	10 Weeks
Mount	Surface Mount
Package / Case	TQFP
Number of Pins	144
Published	1998
JESD-609 Code	e3
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	3
Number of Terminations	144
Termination	SMD/SMT
ECCN Code	EAR99
Terminal Finish	Matte Tin (Sn) - annealed
Max Operating Temperature	70°C
Min Operating Temperature	0°C
Additional Feature	YES
HTS Code	8542.39.00.01
Subcategory	Programmable Logic Devices
Technology	CMOS
Terminal Position	QUAD
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	3.3V
Terminal Pitch	0.5mm
Frequency	126.6MHz
Time@Peak Reflow Temperature-Max (s)	40
Pin Count	144
Operating Supply Voltage	3.3V
Temperature Grade	COMMERCIAL
Max Supply Voltage	3.6V
Min Supply Voltage	3V
Number of I/O	116
Memory Type	EEPROM
Propagation Delay	7.5 ns
Turn On Delay Time	10 ns
Frequency (Max)	126.6MHz
Programmable Logic Type	EE PLD
Number of Gates	5000
Number of Logic Blocks (LABs)	16
Speed Grade	10
Output Function	MACROCELL
Number of Macro Cells	256
JTAG BST	YES
Ambient Temperature Range High	70°C
In-System Programmable	YES
Height	1.6mm
Length	20mm
Width	20mm
Radiation Hardening	No
REACH SVHC	No SVHC
RoHS Status	RoHS Compliant
Lead Free	Lead Free

EPM3256ATC144-10N Overview

Currently, there are 256 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.There is a TQFP package containing it.This device has 116 I/O ports programmed into it.It is programmed to terminate devices at [0].The terminal position of this electrical part is QUAD, which serves as an important access point for passengers or freight.The power supply voltage is 3.3V.This part is part of the family [0].In this chip, the 144pins are programmed.The device can also be used to find [0].In digital circuits, 5000gates serve as building blocks.Optimal efficiency requires a supply voltage of [0].It is recommended that data be stored in [0].Surface Mountis the mounting point of this electronic part.It is designed with 144 pins.With a maximum supply voltage of [0], it operates.The device is designed to operate with a minimal supply voltage of 3VV.There is 126.6MHz frequency that can be achieved.In order to operate, the temperature should be higher than 0°C.Temperatures should not exceed 70°C.It is composed of 16 logic blocks (LABs).It is recommended that the maximum frequency is less than 0.This kind of FPGA is composed of EE PLD.