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CY37128VP160-83ACT

0.5mm PMIC 160 Pin 83MHz 3.3V TQFP

Manufacturer: Cypress Semiconductor
Origchip NO: 217-CY37128VP160-83ACT
Package: TQFP
Datasheet: -
Stock: 347
Description: 0.5mm PMIC 160 Pin 83MHz 3.3V TQFP (Kg)

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Details

Tags

Parameters
Mount	Surface Mount
Package / Case	TQFP
Number of Pins	160
Packaging	Tape and Reel
JESD-609 Code	e0
Number of Terminations	160
Terminal Finish	Tin/Lead (Sn/Pb)
Max Operating Temperature	70°C
Min Operating Temperature	0°C
Technology	CMOS
Terminal Position	QUAD
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	225
Supply Voltage	3.3V
Terminal Pitch	0.5mm
Frequency	83MHz
Time@Peak Reflow Temperature-Max (s)	30
Pin Count	160
Operating Supply Voltage	3.3V
Temperature Grade	COMMERCIAL
Max Supply Voltage	3.6V
Min Supply Voltage	3V
Number of I/O	133
Propagation Delay	15 ns
Turn On Delay Time	15 ns
Organization	1 DEDICATED INPUTS, 133 I/O
Programmable Logic Type	EE PLD
Number of Logic Blocks (LABs)	8
Output Function	MACROCELL
Number of Dedicated Inputs	1
Height Seated (Max)	1.6mm
Length	24mm
Width	24mm
Radiation Hardening	No
RoHS Status	RoHS Compliant

CY37128VP160-83ACT Overview

It is part of the TQFP package.It is programmed with 133 I/Os.It is programmed to terminate devices at [0].This electrical part is wired with a terminal position of QUAD.Power is provided by a supply voltage of 3.3V volts.The chip should be packaged by Tape and Reel.There are 160pins on the chip.High efficiency requires the supply voltage to be maintained at [0].Surface Mountis the mounting point of this electronic part.The pins are [0].There is a maximum supply voltage of 3.6Vwhen the device is operating.Normally, it operates with a voltage of 3VV as its minimum supply voltage.This frequency can be achieved at 83MHz.In order to operate properly, the operating temperature should be higher than 0°C.It is recommended that the operating temperature be below 70°C.In its simplest form, it consists of 8 logic blocks (LABs).A total of 1dedicated inputs are available for detecting the status of input signals.It is possible to classify programmable logic as EE PLD.