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CD74HC73M

2V~6V 60MHz JK Type Flip Flop DUAL 74HC73 14 Pins 74HC Series 14-SOIC (0.154, 3.90mm Width)


  • Manufacturer: Texas Instruments
  • Origchip NO: 815-CD74HC73M
  • Package: 14-SOIC (0.154, 3.90mm Width)
  • Datasheet: PDF
  • Stock: 242
  • Description: 2V~6V 60MHz JK Type Flip Flop DUAL 74HC73 14 Pins 74HC Series 14-SOIC (0.154, 3.90mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time 6 Weeks
Lifecycle Status ACTIVE (Last Updated: 4 days ago)
Contact Plating Gold
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 14-SOIC (0.154, 3.90mm Width)
Number of Pins 14
Weight 129.387224mg
Operating Temperature -55°C~125°C TA
Packaging Tube
Series 74HC
JESD-609 Code e4
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 14
ECCN Code EAR99
Type JK Type
Additional Feature MASTER SLAVE OPERATION
Subcategory FF/Latch
Technology CMOS
Voltage - Supply 2V~6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 4.5V
Base Part Number 74HC73
Function Reset
Output Type Differential
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 6V
Supply Voltage-Min (Vsup) 2V
Number of Channels 2
Load Capacitance 50pF
Output Current 5.2mA
Clock Frequency 60MHz
Propagation Delay 160 ns
Quiescent Current 4μA
Turn On Delay Time 13 ns
Family HC/UH
Logic Function Flip-Flop, JK-Type
Current - Output High, Low 5.2mA 5.2mA
Max I(ol) 0.006 A
Number of Bits per Element 1
Max Propagation Delay @ V, Max CL 28ns @ 6V, 50pF
Prop. Delay@Nom-Sup 40 ns
Trigger Type Negative Edge
Input Capacitance 10pF
Schmitt Trigger No
Power Supply Current-Max (ICC) 0.04mA
Clock Edge Trigger Type Negative Edge
Height 1.75mm
Length 8.65mm
Width 3.91mm
Thickness 1.58mm
Radiation Hardening No
REACH SVHC No SVHC
RoHS Status ROHS3 Compliant
Lead Free Lead Free

CD74HC73M Overview


The item is packaged in 14-SOIC (0.154, 3.90mm Width)cases. D flip flop is embedded in the Tube package. Differentialis the output configured for it. There is a trigger configured with Negative Edge. There is an electric part mounted in the way of Surface Mount. A voltage of 2V~6Vis required for its operation. The operating temperature is -55°C~125°C TA. Logic flip flops of this type are classified as JK Type. JK flip flop belongs to the 74HCseries of FPGAs. There should be no greater frequency than 60MHzon its output. In 14terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. You can search similar parts based on 74HC73. A voltage of 4.5V is used as the power supply for this D latch. This JK flip flop has a 10pFfarad input capacitance. A device of this type belongs to the family of HC/UH. A part of the electronic system is mounted in the way of Surface Mount. Basically, it is designed with a set of 14 pins. It has a clock edge trigger type of Negative Edge. The part is included in FF/Latch. The maximal supply voltage (Vsup) reaches 6V. For normal operation, the supply voltage (Vsup) should be above 2V. This T flip flop features a maximum design flexibility due to its output current of 5.2mA. There is a consumption of 4μAof quiescent current from it. In addition, you can refer to the additinal MASTER SLAVE OPERATION of the D latch. 2 channels are available.

CD74HC73M Features


Tube package
74HC series
14 pins

CD74HC73M Applications


There are a lot of Texas Instruments CD74HC73M Flip Flops applications.

  • Bounce elimination switch
  • Balanced 24 mA output drivers
  • Divide a clock signal by 2 or 4
  • Instrumentation
  • Counters
  • Synchronous counter
  • ESD performance
  • Data transfer
  • ESCC
  • Memory
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