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CD74HC109E

2V~6V 60MHz JK Type Flip Flop DUAL 74HC109 16 Pins 74HC Series 16-DIP (0.300, 7.62mm)

Manufacturer: Texas Instruments
Origchip NO: 815-CD74HC109E
Package: 16-DIP (0.300, 7.62mm)
Datasheet: PDF
Stock: 510
Description: 2V~6V 60MHz JK Type Flip Flop DUAL 74HC109 16 Pins 74HC Series 16-DIP (0.300, 7.62mm)(Kg)

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Details

Tags

Parameters
Factory Lead Time	6 Weeks
Lifecycle Status	ACTIVE (Last Updated: 3 days ago)
Contact Plating	Gold
Mount	Through Hole
Mounting Type	Through Hole
Package / Case	16-DIP (0.300, 7.62mm)
Number of Pins	16
Weight	951.693491mg
Operating Temperature	-55°C~125°C TA
Packaging	Tube
Series	74HC
JESD-609 Code	e4
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	16
ECCN Code	EAR99
Type	JK Type
Subcategory	FF/Latches
Technology	CMOS
Voltage - Supply	2V~6V
Terminal Position	DUAL
Supply Voltage	4.5V
Base Part Number	74HC109
Function	Set(Preset) and Reset
Output Type	Differential
Polarity	Non-Inverting
Supply Voltage-Max (Vsup)	6V
Supply Voltage-Min (Vsup)	2V
Number of Channels	2
Load Capacitance	50pF
Output Current	5.2mA
Clock Frequency	60MHz
Propagation Delay	265 ns
Quiescent Current	4μA
Turn On Delay Time	14 ns
Family	HC/UH
Logic Function	AND, Flip-Flop, JK-Type
Current - Output High, Low	5.2mA 5.2mA
Max I(ol)	0.006 A
Number of Bits per Element	1
Max Propagation Delay @ V, Max CL	31ns @ 6V, 50pF
Prop. Delay@Nom-Sup	53 ns
Trigger Type	Positive Edge
Input Capacitance	10pF
Schmitt Trigger	No
Power Supply Current-Max (ICC)	0.04mA
Clock Edge Trigger Type	Positive Edge
Height	5.08mm
Length	19.3mm
Width	6.35mm
Thickness	3.9mm
Radiation Hardening	No
REACH SVHC	No SVHC
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

CD74HC109E Overview

16-DIP (0.300, 7.62mm)is the way it is packaged. Package Tubeembeds it. There is a Differentialoutput configured with it. This trigger uses the value Positive Edge. It is mounted in the way of Through Hole. The JK flip flop operates at a voltage of 2V~6V. A temperature of -55°C~125°C TAis used in the operation. This D latch has the type JK Type. In FPGA terms, D flip flop is a type of 74HCseries FPGA. You should not exceed 60MHzin its output frequency. There have been 16 terminations. This D latch belongs to the family of 74HC109. It is powered from a supply voltage of 4.5V. A JK flip flop with a 10pFfarad input capacitance is used here. This D flip flop belongs to the family of HC/UH. There is an electronic component mounted in the way of Through Hole. This board has 16 pins. The clock edge trigger type for this device is Positive Edge. There is a FF/Latchesbase part number assigned to the RS flip flops. In this case, the maximum supply voltage (Vsup) reaches 6V. The supply voltage (Vsup) should be maintained above 2V for normal operation. This T flip flop features a maximum design flexibility due to its output current of 5.2mA. There is a consumption of 4μAof quiescent current from it. Currently, there are 2 channels available.