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CD74ACT273PW

4.5V~5.5V 85MHz 8 Bit D-Type Flip Flop DUAL 74ACT273 20 Pins 74ACT Series 20-TSSOP (0.173, 4.40mm Width)

Manufacturer: Texas Instruments
Origchip NO: 815-CD74ACT273PW
Package: 20-TSSOP (0.173, 4.40mm Width)
Datasheet: -
Stock: 485
Description: 4.5V~5.5V 85MHz 8 Bit D-Type Flip Flop DUAL 74ACT273 20 Pins 74ACT Series 20-TSSOP (0.173, 4.40mm Width)(Kg)

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Details

Tags

Parameters
Weight	76.997305mg
Operating Temperature	-55°C~125°C TA
Packaging	Tube
Series	74ACT
JESD-609 Code	e4
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	20
ECCN Code	EAR99
Type	D-Type
Subcategory	FF/Latches
Technology	CMOS
Voltage - Supply	4.5V~5.5V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	5V
Terminal Pitch	0.65mm
Base Part Number	74ACT273
Function	Master Reset
Output Type	Non-Inverted
Operating Supply Voltage	5V
Number of Elements	1
Polarity	Non-Inverting
Power Supplies	5V
Number of Circuits	8
Load Capacitance	50pF
Output Current	24mA
Number of Bits	8
Clock Frequency	85MHz
Propagation Delay	13.5 ns
Quiescent Current	8μA
Turn On Delay Time	3.4 ns
Family	ACT
Logic Function	D-Type, Flip-Flop
Current - Output High, Low	24mA 24mA
Max Propagation Delay @ V, Max CL	12.3ns @ 5V, 50pF
Trigger Type	Positive Edge
Input Capacitance	10pF
Number of Output Lines	4
Clock Edge Trigger Type	Positive Edge
Height	1.2mm
Length	6.5mm
Width	4.4mm
Thickness	1mm
Radiation Hardening	No
REACH SVHC	No SVHC
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free
Factory Lead Time	6 Weeks
Lifecycle Status	ACTIVE (Last Updated: 6 days ago)
Contact Plating	Gold
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	20-TSSOP (0.173, 4.40mm Width)
Number of Pins	20

CD74ACT273PW Overview

The flip flop is packaged in 20-TSSOP (0.173, 4.40mm Width). D flip flop is embedded in the Tube package. Currently, the output is configured to use Non-Inverted. The trigger configured with it uses Positive Edge. It is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 4.5V~5.5V. It is operating at -55°C~125°C TA. The type of this D latch is D-Type. The FPGA belongs to the 74ACT series. You should not exceed 85MHzin its output frequency. In total, there are 1 elements. It has been determined that there have been 20 terminations. The object belongs to the 74ACT273 family. It is powered from a supply voltage of 5V. The input capacitance of this JK flip flopis 10pF farads. Devices in the ACTfamily are electronic devices. There is an electronic part that is mounted in the way of Surface Mount. As you can see from the design, it has pins with 20. This device exhibits a clock edge trigger type of Positive Edge. There is a FF/Latchesbase part number assigned to the RS flip flops. This flip flop is designed with 8 Bits. The superior flexibility of this product is achieved by using 8 circuits. An electrical current of 5V volts is applied to it. Optimal efficiency requires a supply voltage of 5V. Its output current of 24mAallows for maximum design flexibility. There are no output lines on the JK flip flop. There is 8μA quiescent current consumption by it.