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CD4027BM96

3V~18V 24MHz JK Type Flip Flop DUAL CD4027 16 Pins 4μA 4000B Series 16-SOIC (0.154, 3.90mm Width)

Manufacturer: Texas Instruments
Origchip NO: 815-CD4027BM96
Package: 16-SOIC (0.154, 3.90mm Width)
Datasheet: PDF
Stock: 670
Description: 3V~18V 24MHz JK Type Flip Flop DUAL CD4027 16 Pins 4μA 4000B Series 16-SOIC (0.154, 3.90mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time	6 Weeks
Lifecycle Status	ACTIVE (Last Updated: 2 days ago)
Contact Plating	Gold
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	16-SOIC (0.154, 3.90mm Width)
Number of Pins	16
Weight	141.690917mg
Operating Temperature	-55°C~125°C TA
Packaging	Tape & Reel (TR)
Series	4000B
JESD-609 Code	e4
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	16
Type	JK Type
Subcategory	FF/Latches
Packing Method	TR
Technology	CMOS
Voltage - Supply	3V~18V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	5V
Base Part Number	CD4027
Function	Set(Preset) and Reset
Output Type	Differential
Polarity	Non-Inverting
Supply Voltage-Min (Vsup)	3V
Number of Circuits	2
Load Capacitance	50pF
Output Current	6.8mA
Clock Frequency	24MHz
Propagation Delay	45 ns
Quiescent Current	20μA
Turn On Delay Time	45 ns
Logic Function	AND
Current - Quiescent (Iq)	4μA
Current - Output High, Low	6.8mA 6.8mA
Number of Bits per Element	1
Max Propagation Delay @ V, Max CL	90ns @ 15V, 50pF
Trigger Type	Positive Edge
Input Capacitance	5pF
Schmitt Trigger	No
Power Supply Current-Max (ICC)	0.06mA
Clock Edge Trigger Type	Positive Edge
Max Frequency@Nom-Sup	3500000Hz
Height	1.75mm
Length	9.9mm
Width	3.91mm
Thickness	1.58mm
Radiation Hardening	No
REACH SVHC	No SVHC
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

CD4027BM96 Overview

16-SOIC (0.154, 3.90mm Width)is the way it is packaged. Package Tape & Reel (TR)embeds it. In the configuration, Differentialis used as the output. The trigger configured with it uses Positive Edge. The electronic part is mounted in the way of Surface Mount. The JK flip flop operates at 3V~18Vvolts. Currently, the operating temperature is -55°C~125°C TA. The type of this D latch is JK Type. This type of FPGA is a part of the 4000B series. This D flip flop should not have a frequency greater than 24MHz. As a result, it consumes 4μA quiescent current. In 16terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. D latch belongs to the CD4027 family. It is powered from a supply voltage of 5V. Its input capacitance is 5pFfarads. There is an electronic component mounted in the way of Surface Mount. It is designed with 16 pins. Its clock edge trigger type is Positive Edge. This RS flip flops is a part number FF/Latches. The supply voltage (Vsup) should be maintained above 3V for normal operation. In order to achieve its superior flexibility, 2 circuits are used. On the basis of its reliable performance, this D flip flop is well suited for use with TR. As a result of its output current of 6.8mA, it is very flexible in terms of design. It consumes 20μA of quiescent current without being affected by external factors.