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74LVX74SJX

2V~3.6V 85MHz D-Type Flip Flop DUAL 2μA 74LVX Series 14-SOIC (0.209, 5.30mm Width)

Manufacturer: Rochester Electronics, LLC
Origchip NO: 699-74LVX74SJX
Package: 14-SOIC (0.209, 5.30mm Width)
Datasheet: PDF
Stock: 168
Description: 2V~3.6V 85MHz D-Type Flip Flop DUAL 2μA 74LVX Series 14-SOIC (0.209, 5.30mm Width)(Kg)

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Details

Tags

Parameters
RoHS Status	ROHS3 Compliant
Mounting Type	Surface Mount
Package / Case	14-SOIC (0.209, 5.30mm Width)
Surface Mount	YES
Operating Temperature	-40°C~85°C TA
Packaging	Tape & Reel (TR)
Series	74LVX
JESD-609 Code	e3
Pbfree Code	yes
Part Status	Obsolete
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	14
Type	D-Type
Terminal Finish	MATTE TIN
Technology	CMOS
Voltage - Supply	2V~3.6V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	2.7V
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
Function	Set(Preset) and Reset
Qualification Status	Not Qualified
Output Type	Differential
Number of Elements	2
Supply Voltage-Max (Vsup)	3.6V
Supply Voltage-Min (Vsup)	2V
Clock Frequency	85MHz
Family	LV/LV-A/LVX/H
Current - Quiescent (Iq)	2μA
Current - Output High, Low	4mA 4mA
Output Polarity	COMPLEMENTARY
Number of Bits per Element	1
Max Propagation Delay @ V, Max CL	13.2ns @ 3.3V, 50pF
Trigger Type	Positive Edge
Input Capacitance	4pF
fmax-Min	80 MHz
Width	5.3mm

74LVX74SJX Overview

14-SOIC (0.209, 5.30mm Width)is the packaging method. You can find it in the Tape & Reel (TR)package. There is a Differentialoutput configured with it. It is configured with a trigger that uses a value of Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. A voltage of 2V~3.6Vis required for its operation. In this case, the operating temperature is -40°C~85°C TA. It belongs to the type D-Typeof flip flops. The FPGA belongs to the 74LVX series. Its output frequency should not exceed 85MHz. A total of 2elements are present in it. There is a consumption of 2μAof quiescent energy. There have been 14 terminations. A voltage of 2.7V is used as the power supply for this D latch. The input capacitance of this T flip flop is 4pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. In this case, the D flip flop belongs to the LV/LV-A/LVX/Hfamily. It reaches 3.6Vwhen the supply voltage is maximal (Vsup). Normal operation requires a supply voltage (Vsup) above 2V.