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74LVX574M

2V~3.6V 75MHz D-Type Flip Flop DUAL 4μA 74LVX Series 20-SOIC (0.295, 7.50mm Width)

Manufacturer: Rochester Electronics, LLC
Origchip NO: 699-74LVX574M
Package: 20-SOIC (0.295, 7.50mm Width)
Datasheet: PDF
Stock: 277
Description: 2V~3.6V 75MHz D-Type Flip Flop DUAL 4μA 74LVX Series 20-SOIC (0.295, 7.50mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type	Surface Mount
Package / Case	20-SOIC (0.295, 7.50mm Width)
Surface Mount	YES
Operating Temperature	-40°C~85°C TA
Packaging	Tube
Series	74LVX
JESD-609 Code	e3
Pbfree Code	yes
Part Status	Obsolete
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	20
Type	D-Type
Terminal Finish	MATTE TIN
Technology	CMOS
Voltage - Supply	2V~3.6V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	2.7V
Reach Compliance Code	unknown
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
JESD-30 Code	R-PDSO-G20
Function	Standard
Qualification Status	COMMERCIAL
Output Type	Tri-State, Non-Inverted
Number of Elements	1
Supply Voltage-Max (Vsup)	3.6V
Supply Voltage-Min (Vsup)	2V
Number of Ports	2
Clock Frequency	75MHz
Family	LV/LV-A/LVX/H
Current - Quiescent (Iq)	4μA
Output Characteristics	3-STATE
Current - Output High, Low	4mA 4mA
Output Polarity	TRUE
Number of Bits per Element	8
Max Propagation Delay @ V, Max CL	16.7ns @ 3.3V, 50pF
Trigger Type	Positive Edge
Input Capacitance	4pF
Height Seated (Max)	2.642mm
Width	7.493mm
RoHS Status	ROHS3 Compliant

74LVX574M Overview

As a result, it is packaged as 20-SOIC (0.295, 7.50mm Width). A package named Tubeincludes it. As configured, the output uses Tri-State, Non-Inverted. This trigger uses the value Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. Powered by a 2V~3.6Vvolt supply, it operates as follows. A temperature of -40°C~85°C TAis considered to be the operating temperature. D-Typedescribes this flip flop. This type of FPGA is a part of the 74LVX series. You should not exceed 75MHzin its output frequency. The list contains 1 elements. T flip flop consumes 4μA quiescent energy. There have been 20 terminations. It is powered from a supply voltage of 2.7V. This T flip flop has a capacitance of 4pF farads at the input. A device of this type belongs to the family of LV/LV-A/LVX/H. As soon as Vsup reaches 3.6V, the maximum supply voltage is reached. Keeping the supply voltage (Vsup) above 2V is necessary for normal operation. A total of 2ports are embedded in the D flip flop.