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74LVT574WMX

2.7V~3.6V 150MHz 8 Bit D-Type Flip Flop DUAL 74LVT574 20 Pins 74LVT Series 20-SOIC (0.295, 7.50mm Width)

Manufacturer: ON Semiconductor
Origchip NO: 598-74LVT574WMX
Package: 20-SOIC (0.295, 7.50mm Width)
Datasheet: PDF
Stock: 604
Description: 2.7V~3.6V 150MHz 8 Bit D-Type Flip Flop DUAL 74LVT574 20 Pins 74LVT Series 20-SOIC (0.295, 7.50mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time	5 Weeks
Lifecycle Status	ACTIVE (Last Updated: 2 days ago)
Contact Plating	Tin
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	20-SOIC (0.295, 7.50mm Width)
Number of Pins	20
Weight	801mg
Operating Temperature	-40°C~85°C TA
Packaging	Tape & Reel (TR)
Series	74LVT
JESD-609 Code	e3
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	20
ECCN Code	EAR99
Type	D-Type
Subcategory	FF/Latches
Packing Method	TAPE AND REEL
Technology	BICMOS
Voltage - Supply	2.7V~3.6V
Terminal Position	DUAL
Terminal Form	GULL WING
Supply Voltage	3.3V
Base Part Number	74LVT574
Function	Standard
Output Type	Tri-State, Non-Inverted
Operating Supply Voltage	3.3V
Number of Elements	1
Polarity	Non-Inverting
Supply Voltage-Min (Vsup)	2.7V
Number of Circuits	8
Load Capacitance	50pF
Number of Ports	2
Number of Bits	8
Clock Frequency	150MHz
Propagation Delay	6.1 ns
Quiescent Current	190μA
Turn On Delay Time	4.5 ns
Family	LVT
Logic Function	D-Type, Flip-Flop
Current - Output High, Low	32mA 64mA
Max I(ol)	0.064 A
Max Propagation Delay @ V, Max CL	4.6ns @ 3.3V, 50pF
Trigger Type	Positive Edge
Input Capacitance	4pF
Number of Output Lines	3
Clock Edge Trigger Type	Positive Edge
Height Seated (Max)	2.642mm
Radiation Hardening	No
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

74LVT574WMX Overview

In the form of 20-SOIC (0.295, 7.50mm Width), it has been packaged. A package named Tape & Reel (TR)includes it. As configured, the output uses Tri-State, Non-Inverted. This trigger is configured to use Positive Edge. It is mounted in the way of Surface Mount. A supply voltage of 2.7V~3.6V is required for operation. Currently, the operating temperature is -40°C~85°C TA. This D latch has the type D-Type. FPGAs belonging to the 74LVTseries contain this type of chip. Its output frequency should not exceed 150MHz. In total, it contains 1 elements. There are 20 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. This D latch belongs to the family of 74LVT574. An input voltage of 3.3Vpowers the D latch. This JK flip flop has a 4pFfarad input capacitance. In this case, the D flip flop belongs to the LVTfamily. Electronic part Surface Mountis mounted in the way. The 20pins are designed into the board. This device has the clock edge trigger type of Positive Edge. It is included in FF/Latches. The flip flop is designed with 8bits. Normally, the supply voltage (Vsup) should be above 2.7V. Its flexibility is enhanced by 8 circuits. In view of its reliability, this D flip flop is a good fit for TAPE AND REEL. This flip flop has a total of 2ports. A high level of efficiency can be achieved by maintaining the supply voltage at 3.3V. In order for the chip to function, it has 3output lines. It consumes 190μA of quiescent current without being affected by external factors.