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74LVCH162374APAG8

16 Bit Flip Flop DUAL 48 Pins TSSOP

Manufacturer: Integrated Device Technology (IDT)
Origchip NO: 378-74LVCH162374APAG8
Package: TSSOP
Datasheet: PDF
Stock: 270
Description: 16 Bit Flip Flop DUAL 48 Pins TSSOP(Kg)

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Details

Tags

Parameters
Radiation Hardening	No
RoHS Status	RoHS Compliant
Lead Free	Lead Free
Factory Lead Time	7 Weeks
Contact Plating	Tin
Mount	Surface Mount
Package / Case	TSSOP
Number of Pins	48
Packaging	Tape and Reel
Published	2006
JESD-609 Code	e3
Pbfree Code	yes
Part Status	Active
Moisture Sensitivity Level (MSL)	1
Number of Terminations	48
ECCN Code	EAR99
Max Operating Temperature	85°C
Min Operating Temperature	-40°C
Subcategory	FF/Latches
Technology	CMOS
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Number of Functions	2
Supply Voltage	3.3V
Terminal Pitch	0.5mm
Time@Peak Reflow Temperature-Max (s)	30
Pin Count	48
Operating Supply Voltage	3.3V
Number of Elements	2
Polarity	Non-Inverting
Temperature Grade	INDUSTRIAL
Max Supply Voltage	3.6V
Min Supply Voltage	2.7V
Load Capacitance	50pF
Number of Ports	2
Number of Bits	16
Propagation Delay	6.5 ns
Quiescent Current	10μA
Turn On Delay Time	6.5 ns
Family	LVC/LCX/Z
Logic Function	D-Type
Output Characteristics	3-STATE WITH SERIES RESISTOR
Logic IC Type	BUS DRIVER
High Level Output Current	-12mA
Low Level Output Current	12mA
Clock Edge Trigger Type	Positive Edge
Length	12.5mm
Width	6.1mm
Thickness	1mm

74LVCH162374APAG8 Overview

It is embeded in TSSOP case. The Tape and Reelpackage contains it. The element count is 2 . 48terminations have occurred. A voltage of 3.3V provides power to the D latch. An electronic device belonging to the family LVC/LCX/Zcan be found here. Surface Mount mounts this electronic component. There are 48pins on it. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. It is part of the FF/Latchesbase part number family. It is designed with 16bits. The flip flop has 2embedded ports. In order to ensure high efficiency, the supply voltage should remain at 3.3V. This D latch consumes 10μA quiescent current at all. A -12mAvalue is set for the high level output current. The low level output current is set to 12mA. There should be a temperature below 85°Cduring operation. Ideally, the operating temperature should be greater than -40°C. The minimal supply voltage is 2.7V. It supports the maximal supply voltage of 3.6V. BUS DRIVERis used as the logic IC in this D flip flop. It has 2 functions. With 48 pins, it is equipped with a low power consumption.