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74LVCH162374ADGG,1

1.65V~3.6V 330MHz 16 Bit D-Type Flip Flop DUAL 74LVCH162374 48 Pins 20μA 74LVCH Series 48-TFSOP (0.240, 6.10mm Width)

Manufacturer: Nexperia USA Inc.
Origchip NO: 554-74LVCH162374ADGG,1
Package: 48-TFSOP (0.240, 6.10mm Width)
Datasheet: PDF
Stock: 325
Description: 1.65V~3.6V 330MHz 16 Bit D-Type Flip Flop DUAL 74LVCH162374 48 Pins 20μA 74LVCH Series 48-TFSOP (0.240, 6.10mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time	8 Weeks
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	48-TFSOP (0.240, 6.10mm Width)
Number of Pins	48
Operating Temperature	-40°C~125°C TA
Packaging	Tube
Series	74LVCH
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	48
Type	D-Type
Additional Feature	IT ALSO OPERATES AT 1.65 TO 3.6
Technology	CMOS
Voltage - Supply	1.65V~3.6V
Terminal Position	DUAL
Terminal Form	GULL WING
Supply Voltage	1.8V
Terminal Pitch	0.5mm
Base Part Number	74LVCH162374
Function	Standard
Output Type	Tri-State, Non-Inverted
Number of Elements	2
Polarity	Non-Inverting
Supply Voltage-Max (Vsup)	3.6V
Number of Ports	2
Number of Bits	16
Clock Frequency	330MHz
Propagation Delay	10.5 ns
Turn On Delay Time	7 ns
Family	LVC/LCX/Z
Current - Quiescent (Iq)	20μA
Output Characteristics	3-STATE WITH SERIES RESISTOR
Current - Output High, Low	12mA 12mA
Number of Bits per Element	8
Max Propagation Delay @ V, Max CL	6.8ns @ 3.3V, 50pF
Trigger Type	Positive Edge
Input Capacitance	5pF
Clock Edge Trigger Type	Positive Edge
Width	6.1mm
Radiation Hardening	No
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

74LVCH162374ADGG,1 Overview

It is packaged in the way of 48-TFSOP (0.240, 6.10mm Width). You can find it in the Tubepackage. This output is configured with Tri-State, Non-Inverted. It is configured with a trigger that uses a value of Positive Edge. Surface Mountis in the way of this electric part. A voltage of 1.65V~3.6Vis used as the supply voltage. In the operating environment, the temperature is -40°C~125°C TA. D-Typedescribes this flip flop. In FPGA terms, D flip flop is a type of 74LVCHseries FPGA. It should not exceed 330MHzin its output frequency. The list contains 2 elements. It consumes 20μA of quiescent Terminations are 48. If you search by 74LVCH162374, you will find similar parts. A voltage of 1.8V is used as the power supply for this D latch. JK flip flop input capacitance is 5pF farads. LVC/LCX/Zis the family of this D flip flop. Surface Mount mounts this electronic component. As you can see from the design, it has pins with 48. A Positive Edgeclock edge trigger is used in this device. Flip flops designed with 16bits are used in this part. As soon as 3.6Vis reached, Vsup reaches its maximum value. There are 2 ports embedded in the flip flops. Additionally, you may refer to the D latch's additional IT ALSO OPERATES AT 1.65 TO 3.6.