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74LVC2G74GF,115

1.65V~5.5V 200MHz 1 Bit D-Type Flip Flop DUAL 74LVC2G74 8 Pins 40μA 74LVC Series 8-XFDFN

Manufacturer: Nexperia USA Inc.
Origchip NO: 554-74LVC2G74GF,115
Package: 8-XFDFN
Datasheet: PDF
Stock: 161
Description: 1.65V~5.5V 200MHz 1 Bit D-Type Flip Flop DUAL 74LVC2G74 8 Pins 40μA 74LVC Series 8-XFDFN(Kg)

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Details

Tags

Parameters
Factory Lead Time	13 Weeks
Contact Plating	Tin
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	8-XFDFN
Number of Pins	8
Operating Temperature	-40°C~125°C TA
Packaging	Tape & Reel (TR)
Series	74LVC
JESD-609 Code	e3
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	8
Type	D-Type
Technology	CMOS
Voltage - Supply	1.65V~5.5V
Terminal Position	DUAL
Terminal Form	NO LEAD
Peak Reflow Temperature (Cel)	NOT SPECIFIED
Supply Voltage	1.8V
Terminal Pitch	0.35mm
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
Base Part Number	74LVC2G74
Function	Set(Preset) and Reset
Output Type	Differential
Polarity	Non-Inverting
Number of Circuits	1
Number of Bits	1
Clock Frequency	200MHz
Propagation Delay	13.4 ns
Quiescent Current	100nA
Turn On Delay Time	2.5 ns
Family	LVC/LCX/Z
Logic Function	AND, D-Type, Flip-Flop
Current - Quiescent (Iq)	40μA
Current - Output High, Low	32mA 32mA
Max Propagation Delay @ V, Max CL	4.1ns @ 5V, 50pF
Trigger Type	Positive Edge
Input Capacitance	4pF
fmax-Min	200 MHz
Max Supply Voltage (DC)	5.5V
Clock Edge Trigger Type	Positive Edge
Height Seated (Max)	0.5mm
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

74LVC2G74GF,115 Overview

The package is in the form of 8-XFDFN. You can find it in the Tape & Reel (TR)package. T flip flop uses Differentialas its output configuration. In the configuration of the trigger, Positive Edgeis used. This electronic part is mounted in the way of Surface Mount. With a supply voltage of 1.65V~5.5V volts, it operates. In the operating environment, the temperature is -40°C~125°C TA. D-Typeis the type of this D latch. In terms of FPGAs, it belongs to the 74LVC series. Its output frequency should not exceed 200MHz. T flip flop consumes 40μA quiescent energy. There are 8 terminations,You can search similar parts based on 74LVC2G74. A voltage of 1.8V is used as the power supply for this D latch. This JK flip flop has a 4pFfarad input capacitance. It belongs to the family of electronic devices known as LVC/LCX/Z. A part of the electronic system is mounted in the way of Surface Mount. There are 8pins on it. This device has Positive Edgeas its clock edge trigger type. The flip flop is designed with 1bits. Its superior flexibility is attributed to its use of 1 circuits. There is 100nA quiescent current consumption by it.