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74HC109D,653

2V~6V 81MHz JK Type Flip Flop DUAL 74HC109 16 Pins 74HC Series 16-SOIC (0.154, 3.90mm Width)

Manufacturer: Nexperia USA Inc.
Origchip NO: 554-74HC109D,653
Package: 16-SOIC (0.154, 3.90mm Width)
Datasheet: PDF
Stock: 773
Description: 2V~6V 81MHz JK Type Flip Flop DUAL 74HC109 16 Pins 74HC Series 16-SOIC (0.154, 3.90mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time	4 Weeks
Contact Plating	Gold
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	16-SOIC (0.154, 3.90mm Width)
Number of Pins	16
Operating Temperature	-40°C~125°C TA
Packaging	Tape & Reel (TR)
Published	1997
Series	74HC
JESD-609 Code	e4
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	16
Type	JK Type
Technology	CMOS
Voltage - Supply	2V~6V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	4.5V
Time@Peak Reflow Temperature-Max (s)	30
Base Part Number	74HC109
Function	Set(Preset) and Reset
Output Type	Differential
Operating Supply Voltage	5V
Polarity	Non-Inverting
Supply Voltage-Max (Vsup)	6V
Supply Voltage-Min (Vsup)	2V
Number of Circuits	2
Clock Frequency	81MHz
Propagation Delay	280 ns
Quiescent Current	4μA
Turn On Delay Time	9 ns
Family	HC/UH
Logic Function	AND, Flip-Flop, JK-Type
Number of Inputs	5
Current - Output High, Low	5.2mA 5.2mA
Number of Bits per Element	1
Max Propagation Delay @ V, Max CL	30ns @ 6V, 50pF
Trigger Type	Positive Edge
Input Capacitance	3.5pF
Clock Edge Trigger Type	Positive Edge
Length	9.9mm
Width	3.9mm
Radiation Hardening	No
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

74HC109D,653 Overview

It is packaged in the way of 16-SOIC (0.154, 3.90mm Width). D flip flop is embedded in the Tape & Reel (TR) package. This output is configured with Differential. In the configuration of the trigger, Positive Edgeis used. The electronic part is mounted in the way of Surface Mount. The supply voltage is set to 2V~6V. Temperature is set to -40°C~125°C TA. This logic flip flop is classified as type JK Type. In FPGA terms, D flip flop is a type of 74HCseries FPGA. This D flip flop should not have a frequency greater than 81MHz. The number of terminations is 16. The 74HC109 family contains this object. It is powered by a voltage of 4.5V . This JK flip flop has a 3.5pFfarad input capacitance. It is a member of the HC/UHfamily of D flip flop. There is an electronic part mounted in the way of Surface Mount. There are 16pins on it. This device has Positive Edgeas its clock edge trigger type. As soon as 6Vis reached, Vsup reaches its maximum value. If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 2V. In order to achieve its superior flexibility, 2 circuits are used. It is recommended that the supply voltage be kept at 5Vto maximize efficiency. Despite external influences, it consumes 4μAof quiescent current. The system employs 5inputs.