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74AUP1G79GM,115

0.8V~3.6V 309MHz 1 Bit D-Type Flip Flop DUAL 74AUP1G79 6 Pins 74AUP Series 6-XFDFN

Manufacturer: Nexperia USA Inc.
Origchip NO: 554-74AUP1G79GM,115
Package: 6-XFDFN
Datasheet: PDF
Stock: 259
Description: 0.8V~3.6V 309MHz 1 Bit D-Type Flip Flop DUAL 74AUP1G79 6 Pins 74AUP Series 6-XFDFN(Kg)

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Shipping Cost

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Details

Tags

Parameters
Factory Lead Time	13 Weeks
Contact Plating	Tin
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	6-XFDFN
Number of Pins	6
Operating Temperature	-40°C~125°C TA
Packaging	Tape & Reel (TR)
Series	74AUP
JESD-609 Code	e3
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	6
Type	D-Type
Technology	CMOS
Voltage - Supply	0.8V~3.6V
Terminal Position	DUAL
Peak Reflow Temperature (Cel)	260
Supply Voltage	1.1V
Terminal Pitch	0.5mm
Time@Peak Reflow Temperature-Max (s)	30
Base Part Number	74AUP1G79
Function	Standard
Output Type	Non-Inverted
Polarity	Non-Inverting
Supply Voltage-Min (Vsup)	0.8V
Number of Circuits	1
Number of Bits	1
Clock Frequency	309MHz
Propagation Delay	17.3 ns
Quiescent Current	500nA
Turn On Delay Time	2 ns
Family	AUP/ULP/V
Current - Output High, Low	4mA 4mA
Max Propagation Delay @ V, Max CL	5.8ns @ 3.3V, 50pF
Trigger Type	Positive Edge
Input Capacitance	0.8pF
Clock Edge Trigger Type	Positive Edge
Height Seated (Max)	0.5mm
Radiation Hardening	No
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

74AUP1G79GM,115 Overview

The package is in the form of 6-XFDFN. There is an embedded version in the package Tape & Reel (TR). It is configured with Non-Invertedas an output. It is configured with a trigger that uses Positive Edge. There is an electric part mounted in the way of Surface Mount. A 0.8V~3.6Vsupply voltage is required for it to operate. A temperature of -40°C~125°C TAis used in the operation. D-Typedescribes this flip flop. The FPGA belongs to the 74AUP series. A frequency of 309MHzshould not be exceeded by its output. A total of 6 terminations have been made. If you search by 74AUP1G79, you will find similar parts. The power source is powered by 1.1V. This JK flip flop has a 0.8pFfarad input capacitance. Devices in the AUP/ULP/Vfamily are electronic devices. Surface Mount mounts this electronic component. There are 6pins on it. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. An electronic part with 1bits has been designed. Keeping the supply voltage (Vsup) above 0.8V is necessary for normal operation. The superior flexibility is achieved through the use of 1 circuits. As a result, it consumes 500nA of quiescent current without being affected by external factors.