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74AUP1G175GW,125

0.8V~3.6V 300MHz 1 Bit D-Type Flip Flop 74AUP1G175 6 Pins 500nA 74AUP Series 6-TSSOP, SC-88, SOT-363

Manufacturer: Nexperia USA Inc.
Origchip NO: 554-74AUP1G175GW,125
Package: 6-TSSOP, SC-88, SOT-363
Datasheet: PDF
Stock: 804
Description: 0.8V~3.6V 300MHz 1 Bit D-Type Flip Flop 74AUP1G175 6 Pins 500nA 74AUP Series 6-TSSOP, SC-88, SOT-363(Kg)

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Details

Tags

Parameters
Factory Lead Time	4 Weeks
Contact Plating	Tin
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	6-TSSOP, SC-88, SOT-363
Number of Pins	6
Supplier Device Package	6-TSSOP
Operating Temperature	-40°C~125°C TA
Packaging	Tape & Reel (TR)
Series	74AUP
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Type	D-Type
Max Operating Temperature	125°C
Min Operating Temperature	-40°C
Voltage - Supply	0.8V~3.6V
Frequency	50MHz
Base Part Number	74AUP1G175
Function	Reset
Output Type	Non-Inverted
Number of Elements	1
Polarity	Non-Inverting
Number of Circuits	1
Max Supply Voltage	3.6V
Min Supply Voltage	800mV
Number of Bits	1
Clock Frequency	300MHz
Propagation Delay	21 ns
Quiescent Current	500nA
Turn On Delay Time	21.1 ns
Logic Function	D-Type
Current - Quiescent (Iq)	500nA
Current - Output High, Low	4mA 4mA
Number of Bits per Element	1
Max Propagation Delay @ V, Max CL	5.7ns @ 3.3V, 30pF
Trigger Type	Positive Edge
High Level Output Current	-4mA
Input Capacitance	0.8pF
Low Level Output Current	4mA
Number of Input Lines	1
Number of Output Lines	1
Clock Edge Trigger Type	Positive Edge
Radiation Hardening	No
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free

74AUP1G175GW,125 Overview

In the form of 6-TSSOP, SC-88, SOT-363, it has been packaged. A package named Tape & Reel (TR)includes it. Currently, the output is configured to use Non-Inverted. It is configured with a trigger that uses Positive Edge. This electronic part is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 0.8V~3.6V volts. Temperature is set to -40°C~125°C TA. This D latch has the type D-Type. JK flip flop belongs to the 74AUPseries of FPGAs. Its output frequency should not exceed 300MHz. In total, there are 1 elements. As a result, it consumes 500nA quiescent current and is not affected by external forces. D latch belongs to the 74AUP1G175 family. A 0.8pFfarad input capacitance is provided by this T flip flop. There is an electronic part mounted in the way of Surface Mount. 6pins are included in its design. This device's clock edge trigger type is Positive Edge. There are 1bits in this flip flop. Despite its superior flexibility, it relies on 1 circuits to achieve it. There are 1 output lines in this JK flip flop. It is reported that there are 1 input lines. It consumes 500nA of quiescent current without being affected by external factors. A high level output current of -4mAis set. A 4mAvalue is set for low-level output current. Ideally, the operating temperature should be below 125°C. It is recommended that the operating temperature is higher than -40°C. It is powered by 800mV as its minimum supply voltage. The maximum supply voltage supported by the flip flop is 3.6V. We are able to achieve a frequency of 50MHz.