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74AUP1G175GN,132

0.8V~3.6V 300MHz 1 Bit D-Type Flip Flop DUAL 74AUP1G175 6 Pins 500nA 74AUP Series 6-XFDFN

Manufacturer: Nexperia USA Inc.
Origchip NO: 554-74AUP1G175GN,132
Package: 6-XFDFN
Datasheet: PDF
Stock: 482
Description: 0.8V~3.6V 300MHz 1 Bit D-Type Flip Flop DUAL 74AUP1G175 6 Pins 500nA 74AUP Series 6-XFDFN(Kg)

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Details

Tags

Parameters
Factory Lead Time	13 Weeks
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	6-XFDFN
Number of Pins	6
Operating Temperature	-40°C~125°C TA
Packaging	Tape & Reel (TR)
Series	74AUP
JESD-609 Code	e3
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	6
Type	D-Type
Terminal Finish	Tin (Sn)
Technology	CMOS
Voltage - Supply	0.8V~3.6V
Terminal Position	DUAL
Terminal Form	NO LEAD
Peak Reflow Temperature (Cel)	NOT SPECIFIED
Supply Voltage	1.1V
Terminal Pitch	0.3mm
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
Base Part Number	74AUP1G175
Function	Reset
Output Type	Non-Inverted
Number of Elements	1
Polarity	Non-Inverting
Supply Voltage-Min (Vsup)	0.8V
Number of Bits	1
Clock Frequency	300MHz
Propagation Delay	12 ns
Turn On Delay Time	21.1 ns
Family	AUP/ULP/V
Current - Quiescent (Iq)	500nA
Current - Output High, Low	4mA 4mA
Max Propagation Delay @ V, Max CL	5.7ns @ 3.3V, 30pF
Trigger Type	Positive Edge
Input Capacitance	0.8pF
Clock Edge Trigger Type	Positive Edge
Height Seated (Max)	0.35mm
Width	0.9mm
RoHS Status	ROHS3 Compliant

74AUP1G175GN,132 Overview

The flip flop is packaged in 6-XFDFN. It is contained within the Tape & Reel (TR)package. Currently, the output is configured to use Non-Inverted. This trigger uses the value Positive Edge. It is mounted in the way of Surface Mount. The supply voltage is set to 0.8V~3.6V. It is at -40°C~125°C TAdegrees Celsius that the system is operating. This D latch has the type D-Type. JK flip flop belongs to the 74AUPseries of FPGAs. It should not exceed 300MHzin its output frequency. There are 1 elements in it. As a result, it consumes 500nA of quiescent current without being affected by external factors. 6terminations have occurred. It is a member of the 74AUP1G175 family. The power source is powered by 1.1V. Input capacitance of this device is 0.8pF farads. This D flip flop belongs to the family of AUP/ULP/V. There is an electronic part mounted in the way of Surface Mount. This board is designed with 6pins on it. This device has the clock edge trigger type of Positive Edge. The design is based on 1bits. A normal operating voltage (Vsup) should remain above 0.8V.