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74ACT74MTCX

4.5V~5.5V 210MHz D-Type Flip Flop DUAL 20μA 74ACT Series 14-TSSOP (0.173, 4.40mm Width)

Manufacturer: Rochester Electronics, LLC
Origchip NO: 699-74ACT74MTCX
Package: 14-TSSOP (0.173, 4.40mm Width)
Datasheet: PDF
Stock: 132
Description: 4.5V~5.5V 210MHz D-Type Flip Flop DUAL 20μA 74ACT Series 14-TSSOP (0.173, 4.40mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type	Surface Mount
Package / Case	14-TSSOP (0.173, 4.40mm Width)
Surface Mount	YES
Operating Temperature	-40°C~85°C TA
Packaging	Tape & Reel (TR)
Series	74ACT
JESD-609 Code	e3
Pbfree Code	yes
Part Status	Obsolete
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	14
Type	D-Type
Terminal Finish	MATTE TIN
Technology	CMOS
Voltage - Supply	4.5V~5.5V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	5V
Terminal Pitch	0.65mm
Reach Compliance Code	unknown
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
Function	Set(Preset) and Reset
Qualification Status	Not Qualified
Output Type	Differential
Number of Elements	2
Supply Voltage-Max (Vsup)	5.5V
Supply Voltage-Min (Vsup)	4.5V
Clock Frequency	210MHz
Family	ACT
Current - Quiescent (Iq)	20μA
Current - Output High, Low	24mA 24mA
Output Polarity	COMPLEMENTARY
Number of Bits per Element	1
Max Propagation Delay @ V, Max CL	11ns @ 5V, 50pF
Trigger Type	Positive Edge
Input Capacitance	4.5pF
Length	5mm
Width	4.4mm
RoHS Status	ROHS3 Compliant

74ACT74MTCX Overview

The flip flop is packaged in a case of 14-TSSOP (0.173, 4.40mm Width). D flip flop is included in the Tape & Reel (TR)package. T flip flop is configured with an output of Differential. It is configured with a trigger that uses a value of Positive Edge. It is mounted in the way of Surface Mount. A supply voltage of 4.5V~5.5V is required for operation. A temperature of -40°C~85°C TAis used in the operation. D-Typedescribes this flip flop. The 74ACTseries comprises this type of FPGA. You should not exceed 210MHzin its output frequency. In total, it contains 2 elements. It consumes 20μA of quiescent A total of 14terminations have been recorded. The D flip flop is powered by a voltage of 5V . JK flip flop input capacitance is 4.5pF farads. It is a member of the ACTfamily of D flip flop. The maximal supply voltage (Vsup) reaches 5.5V. If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 4.5V.