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74ACT377PC

4.5V~5.5V 175MHz D-Type Flip Flop DUAL 40μA 74ACT Series 20-DIP (0.300, 7.62mm)

Manufacturer: Rochester Electronics, LLC
Origchip NO: 699-74ACT377PC
Package: 20-DIP (0.300, 7.62mm)
Datasheet: PDF
Stock: 787
Description: 4.5V~5.5V 175MHz D-Type Flip Flop DUAL 40μA 74ACT Series 20-DIP (0.300, 7.62mm)(Kg)

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Details

Tags

Parameters
Mounting Type	Through Hole
Package / Case	20-DIP (0.300, 7.62mm)
Surface Mount	NO
Operating Temperature	-40°C~85°C TA
Packaging	Tube
Series	74ACT
JESD-609 Code	e3
Pbfree Code	yes
Part Status	Obsolete
Moisture Sensitivity Level (MSL)	3 (168 Hours)
Number of Terminations	20
Type	D-Type
Terminal Finish	MATTE TIN
Additional Feature	WITH HOLD MODE
Technology	CMOS
Voltage - Supply	4.5V~5.5V
Terminal Position	DUAL
Peak Reflow Temperature (Cel)	NOT APPLICABLE
Supply Voltage	5V
Terminal Pitch	2.54mm
Reach Compliance Code	unknown
Time@Peak Reflow Temperature-Max (s)	NOT APPLICABLE
JESD-30 Code	R-PDIP-T20
Function	Standard
Qualification Status	Not Qualified
Output Type	Non-Inverted
Number of Elements	1
Supply Voltage-Max (Vsup)	5.5V
Supply Voltage-Min (Vsup)	4.5V
Clock Frequency	175MHz
Family	ACT
Current - Quiescent (Iq)	40μA
Current - Output High, Low	24mA 24mA
Output Polarity	TRUE
Number of Bits per Element	8
Max Propagation Delay @ V, Max CL	10ns @ 5V, 50pF
Trigger Type	Positive Edge
Input Capacitance	4.5pF
Length	26.075mm
Width	7.62mm
RoHS Status	ROHS3 Compliant

74ACT377PC Overview

It is embeded in 20-DIP (0.300, 7.62mm) case. D flip flop is embedded in the Tube package. Currently, the output is configured to use Non-Inverted. In the configuration of the trigger, Positive Edgeis used. It is mounted in the way of Through Hole. A supply voltage of 4.5V~5.5V is required for operation. It is at -40°C~85°C TAdegrees Celsius that the system is operating. This D latch has the type D-Type. The 74ACTseries comprises this type of FPGA. Its output frequency should not exceed 175MHz. The list contains 1 elements. As a result, it consumes 40μA quiescent current. There have been 20 terminations. A voltage of 5V is used to power it. A 4.5pFfarad input capacitance is provided by this T flip flop. In this case, the D flip flop belongs to the ACTfamily. 5.5Vis the maximum supply voltage (Vsup). Normal operation requires a supply voltage (Vsup) above 4.5V. As an additional reference, you may refer to electronic flip flop WITH HOLD MODE.