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74ACT374MTCX

4.5V~5.5V 160MHz D-Type Flip Flop DUAL 40μA 74ACT Series 20-TSSOP (0.173, 4.40mm Width)

Manufacturer: Rochester Electronics, LLC
Origchip NO: 699-74ACT374MTCX
Package: 20-TSSOP (0.173, 4.40mm Width)
Datasheet: PDF
Stock: 142
Description: 4.5V~5.5V 160MHz D-Type Flip Flop DUAL 40μA 74ACT Series 20-TSSOP (0.173, 4.40mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type	Surface Mount
Package / Case	20-TSSOP (0.173, 4.40mm Width)
Surface Mount	YES
Operating Temperature	-40°C~85°C TA
Packaging	Tape & Reel (TR)
Published	2005
Series	74ACT
JESD-609 Code	e3
Pbfree Code	yes
Part Status	Obsolete
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	20
Type	D-Type
Terminal Finish	MATTE TIN
Technology	CMOS
Voltage - Supply	4.5V~5.5V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	5V
Terminal Pitch	0.65mm
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
JESD-30 Code	R-PDSO-G20
Function	Standard
Output Type	Tri-State, Non-Inverted
Number of Elements	1
Supply Voltage-Max (Vsup)	5.5V
Supply Voltage-Min (Vsup)	4.5V
Number of Ports	2
Clock Frequency	160MHz
Family	ACT
Current - Quiescent (Iq)	40μA
Output Characteristics	3-STATE
Current - Output High, Low	24mA 24mA
Output Polarity	TRUE
Number of Bits per Element	8
Max Propagation Delay @ V, Max CL	10ns @ 5V, 50pF
Trigger Type	Positive Edge
Input Capacitance	4.5pF
Length	6.5mm
Width	4.4mm
RoHS Status	ROHS3 Compliant

74ACT374MTCX Overview

As a result, it is packaged as 20-TSSOP (0.173, 4.40mm Width). The Tape & Reel (TR)package contains it. As configured, the output uses Tri-State, Non-Inverted. JK flip flop uses Positive Edgeas the trigger. Surface Mountmounts this electrical part. A supply voltage of 4.5V~5.5V is required for operation. It is operating at -40°C~85°C TA. D-Typedescribes this flip flop. JK flip flop belongs to the 74ACTseries of FPGAs. This D flip flop should not have a frequency greater than 160MHz. In total, there are 1 elements. There is 40μA quiescent consumption. It has been determined that there have been 20 terminations. A voltage of 5V is used to power it. JK flip flop input capacitance is 4.5pF farads. Devices in the ACTfamily are electronic devices. Vsup reaches 5.5V, the maximal supply voltage. For normal operation, the supply voltage (Vsup) should be above 4.5V. The flip flop has 2ports embedded within it.